AK4649 Datasheet, PDF (86/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK-AMP

[AK4649]
■ MIC Input Recording (Stereo)
FS3-0 bits _X,XXX
(Addr:05H, D5,D2-0)
(1)
MIC Control
(Addr:02H, D2-0
Addr: 03H, D5)
X, XXX
(2)
1,111
0, 001
Timer Select
(Addr:06H)
X, X...X
(3)
X, 1110000
ALC Control 2 _XXH
(Addr:08H )
(4)
E1H
IVL7-0 bits
(Addr:09H)
ALC Control 3
(Addr:0BH, D7-6)
XXH
XX
(5)
(6)
E1H
00
ALC Control 1
(Addr:07H)
Digital Filter Path
(Addr:26H)
Filter Select
(Addr:11H, 30H)
XXH
XXH
XX....X
(7)
(8)
(9)
A1H
03H
XX....X
Filter Co-ef
(Addr:12-1FH, 28H,
32-4FH)
ALC1 State
PMPFIL bit
PMADL/R bit
(Addr:00H, D7, D0
Addr: 10H, D0)
XX....X
(10)
ALC1 Disable
XX....X
ALC1 Enable
(11) _{267/fs or 1059/fs}
(13)
ALC1 Disable
(12)
SDTO pin
State
0 data Output
Normal
Initialize _{Data Output} 0 data output
Example:
PLL Master Mode
Audio I/F Format: MSB justified
Pre MIC Amp: +20dB
MIC Power ON
Sampling Frequency: 44.1kHz
ALC1 setting:Refer to Table 34
HPF1: fc=108.8Hz, ADRST bit = “1”
Programmable Filter OFF
(1) Addr:05H, Data:27H
(2) Addr:02H, Data:05H
Addr: 03H, Data: 00H
(3) Addr:06H, Data:F0H
(4) Addr:08H, Data:E1H
(5) Addr:09H, Data:E1H
(6) Addr:0BH, Data:00H
(7) Addr:07H, Data:A1H
(8) Addr:26H, Data:03H
(9) Addr:28H, Data:80H
(10) Addr:11H, Data:01H
(11) Addr:00H, Data:C1H
Addr: 10H, Data: 81H
Recording
(12) Addr:00H, Data:40H
Addr: 10H, Data: 01H
(13) Addr:07H, Data:81H
Figure 59. MIC Input Recording Sequence
<Example>
This sequence is an example of ALC1 setting at fs=44.1kHz. For changing the parameter of ALC, please refer to
“Figure 36. Registers Set-up Sequence at ALC1 Operation (recording path)”
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4649 is PLL mode, MIC, ADC and Programmable Filter
must be powered-up in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up MIC Gain (Addr = 02H, 03H)
(3) Set up ALC1 Timer and ADRST bit (Addr = 06H)
(4) Set up IREF value for ALC1 (Addr = 08H)
(5) Set up IVOL value at ALC1 operation start
(6) Set up LMTH1 and RGAIN1 bits (Addr = 0BH)
(7) Set up LFST, LMTH0, RGAIN0, LMAT1-0, ZELMN and ALC1 bits (Addr = 07H)
(8) Set up Programmable Filter Path: PFSDO = ADCPF bits = “1” (Addr = 26H)
(9) Set up Coefficient Programmable Filter (Addr = 12H ∼ 1FH, 28H, 32H ∼ 4FH)
(10) Set up of Programmable Filter ON/OFF
(11) Power Up MIC, ADC and Programmable Filter: PMADL =PMADR =PMPFIL bits = “0” →“1”
The initialization cycle time of ADC is 1059/fs=24ms @ fs=44.1kHz, ADRST bit = “0”. ADC outputs “0” data
during the initialization cycle. After the ALC1 bit is set to “1”, the ALC1 operation starts from IVOL value of
(4).
(12) Power Down MIC, ADC and Programmable Filter: PMADL =PMADR =PMPFIL bits = “1” → “0”
(13) ALC1 Disable: ALC1 bit = “1” → “0”
MS1023-E-01
- 86 -
2010/08