AK4649 Datasheet, PDF (67/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK-AMP

[AK4649]
■ Register Definitions
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Power Management 1 PMPFIL PMVCM PMBP PMSPK PMLO PMDAC
0
PMADL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Default
0
0
0
0
0
0
0
0
PMADL: MIC-Amp Lch and ADC Lch Power Management
0: Power-down (default)
1: Power-up
When the PMADL or PMADR bit is changed from “0” to “1”, the initialization cycle (1059/fs=24ms
@44.1kHz) starts. After initializing, digital data of the ADC is output.
PMDAC: DAC Power Management
0: Power-down (default)
1: Power-up
PMLO: Stereo Line Out Power Management
0: Power-down (default)
1: Power-up
PMSPK: Speaker-Amp Power Management
0: Power-down (default)
1: Power-up
PMBP: MIN Input Power Management
0: Power-down (default)
1: Power-up
Both PMDAC and PMBP bits must be set to “1” when DAC is powered-up for playback. After that, BEEPL or
BEEPS bit is used to control each path when MIN input is used.
PMVCM: VCOM Power Management
0: Power-down (default)
1: Power-up
PMPFIL: Programmable Filter Block (HPF2/LPF/FIL3/EQ/5 Band EQ/ALC) Power Management
0: Power down (default)
1: Power up
All blocks can be powered-down by writing “0” to the address “00H”, PMPLL, PMDML, PMDMR, DMPE,
PMADR and MCKO bits. In this case, register values are maintained.
PMVCM bit must be “1” when one of bocks is powered-up. PMVCM bit can only be “0” when the address “00H”
and all power management bits (PMPLL, PMMP, PMDML, PMDMR, DMPE, PMADR and MCKO) are “0”.
When using either ADC, DAC or Programmable Filter (PMADL bit = “1”, PMADR bit =”1”, PMDAC bit = “1” or
PMPFIL bit = “1”), clock must be supplied.
MS1023-E-01
- 67 -
2010/08