AK4649 Datasheet, PDF (31/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK-AMP

[AK4649]
■ System Reset
Upon power-up, the AK4649 must be reset by bringing the PDN pin = “L”. This ensures that all internal registers reset to
their initial value. The PDN pin recommends inputting “L” at power-up.
The ADC enters an initialization cycle when the PMADL or PMADR bit is changed from “0” to “1”. The initialization
cycle time is set by ADRST bit (Table 16). During the initialization cycle, the ADC digital data outputs of both channels
are forced to a 2's complement, “0”. The ADC output reflects the analog input signal after the initialization cycle is
complete. When using a digital microphone, the initialization cycle is the same as ADC’s.
(Note) The initial data of ADC has offset data that depends on the condition of the microphone and the cut-off frequency
of HPF. If this offset is not small, make initialization cycle longer by setting ADRST bit = “0” or do not use the
initial data of ADC.
ADRST bit
0
1
Initialization Cycle
Cycle
fs = 8kHz
fs = 16kHz
1059/fs
132.4ms
66.2ms
267/fs
33.4ms
16.7ms
Table 16. ADC Initialization Cycle
fs = 44.1kHz
24ms
6.1ms
■ Audio Interface Format
Four types of data formats are available and selected by setting the DIF1-0 bits (Table 17). In all modes, the serial data is
MSB first, 2’s complement format. Audio interface formats can be used in both master and slave modes. LRCK and BICK
are output from the AK4649 in master mode, but must be input to the AK4649 in slave mode. The SDTO is clocked out on
the falling edge (“↓”) of BICK and the SDTI is latched on the rising edge (“↑”).
Mode
0
1
2
3
DIF1 bit
0
0
1
1
DIF0 bit
0
1
0
1
SDTO (ADC)
24bit MSB justified
24bit MSB justified
24bit MSB justified
I²S Compatible
SDTI (DAC)
24bit LSB justified
16bit LSB justified
24bit MSB justified
I²S Compatible
Table 17. Audio Interface Format
BICK
≥ 48fs
≥ 32fs
≥ 48fs
=32fs or
≥ 48fs
Figure
Figure 20
Figure 21
Figure 22
(default)
Figure 23
If 24-bit(16-bit) data that ADC outputs is converted to 8-bit data by removing LSB 16-bit(8-bit), “−1” at 24-bit(16-bit)
data is converted to “−1” at 8-bit data. And when the DAC playbacks this 8-bit data, “−1” at 8-bit data will be converted
to “−65536” at 24-bit (“−256” at 16-bit) data which is a large offset. This offset can be removed by adding the offset of
“32768” at 24-bit(“128” at 16-bit) to 24-bit(16-bit) data before converting to 8-bit data.
MS1023-E-01
- 31 -
2010/08