AK4649 Datasheet, PDF (87/96 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK-AMP

[AK4649]
■ Digital MIC Input Recording (Stereo)
FS3-0 bits _X,XXX
(Addr:05H, D5,D2-0)
(1)
Timer Select _X,X...X
(Addr:06H)
(2)
1,111
X, 1110000
ALC Control 2
(Addr:08H )
IVL7-0 bits
(Addr:09H)
ALC Control 3
(Addr:0BH, D7-6)
ALC Control 1
(Addr:07H)
Digital Filter Path
(Addr:26H)
Filter Select
(Addr:11H, 30H)
XXH
(3)
XXH
(4)
XX
(5)
XXH
XXH
XX....X
(6)
(7)
(8)
E1H
E1H
00
A1H
03H
XX....X
Filter Co-ef
(Addr:12-1FH, 28H,
32-4FH)
XX....X
XX....X
(9)
ALC1 State
ALC1 Disable
ALC1 Enable
(14)
ALC1 Disable
Example:
PLL Master Mode
Audio I/F Format: MSB justified
Sampling Frequency: 44.1kHz
Digital MIC setting:
D ata is latched on the DMCLK failing edge
Digital MIC Power Supply “Externally”
ALC1 setting:Refer to Table 34
HPF1: fc=108.8Hz, ADRST bit = “1”
Programmable Filter OFF
(1) Addr:05H, Data:27H
(2) Addr:06H, Data:F0H
(3) Addr:08H, Data:E1H
(4) Addr:09H, Data:E1H
(5) Addr:07H, Data:A1H
(6) Addr:0BH, Data:00H
(7) Addr:26H, Data:03H
(8) Addr:28H, Data:80H
(9) Addr:11H, Data:01H
PMPFIL bit
(Addr:00H, D7)
Digital MIC
(Addr:27H)
SDTO pin
State
0 X 00 XXXX
(10)
0 X 11 XXXX
(11) ^{267/fs or 1059/fs}
(13)
0 X 00 XXXX
(12)
0 data output
Normal
data ouput ^{0 data output}
(10) Addr:00H, Data:C0H
(11) Addr:27H, Data:3BH
Recording
(12) Addr:27H, Data:0BH
(13) Addr:00H, Data:40H
Figure 60. Digital MIC Input Recording Sequence
(14) Addr:07H, Data:81H
<Example>
This sequence is an example of ALC1 setting at fs=44.1kHz. For changing the parameter of ALC, please refer to
“Figure 36. Registers Set-up Sequence at ALC1 Operation (recording path)”
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4649 is PLL mode, Digital MIC and Programmable
Filter must be powered-up in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up ALC1 Timer and ADRST bit (Addr = 06H)
(3) Set up IREF value for ALC1 (Addr = 08H)
(4) Set up IVOL value at ALC1 operation start (Addr = 09H)
(5) Set up LMTH1 and RGAIN1 bits (Addr = 0BH)
(6) Set up LFST, LMTH0, RGAIN0, LMAT1-0, ZELMN and ALC1 bits (Addr = 07H)
(7) Set up Programmable Filter Path: PFSDO = ADCPF bits = “1” (Addr = 26H)
(8) Set up Coefficient of Programmable Filter (Addr = 12H ∼ 1FH, 28H, 32H ∼ 4FH)
(9) Set up Programmable Filter ON/OFF
(10) Power Up Programmable Filter: PMPFIL bit = “0” →“1”
(11) Set up & Power Up Digital MIC: PMDMR = PMDML bits = “0” →“1”
The initialization cycle time of ADC is 1059/fs=24ms @ fs=44.1kHz, .ADRST bit = “1”. ADC outputs “0” data
during initialization cycle. After the ALC1 bit is set to “1”, the ALC1 operation starts from IVOL value of (4).
(12) Power Down Digital MIC: PMDMR = PMDML bits = “1” →“0”
(13) Power Down Programmable Filter: PMPFIL bit = “1” → “0”
(14) ALC1 Disable: ALC1 bit = “1” → “0”
MS1023-E-01
- 87 -
2010/08