AK4371 Datasheet, PDF (7/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4371]
ANALOG CHARACTERISTICS
(Ta=25°C; AVDD=PVDD=DVDD=HVDD=2.4V, VSS1=VSS2=VSS3=0V; fs=44.1kHz; EXT mode; BOOST OFF;
Slave Mode; Signal Frequency =1kHz; Measurement band width=20Hz ∼ 20kHz; Headphone-Amp: Load impedance is a
serial connection with R_L =16Ω and C_L=220μF. (Refer to Figure 45; unless otherwise specified)
Parameter
min
typ
max
Units
DAC Resolution
-
-
24
bit
Headphone-Amp: (HPL/HPR pins) (Note 8)
Analog Output Characteristics
THD+N −3dBFS Output, 2.4V, Po=10mW@16Ω
-
−50
−40
dB
0dBFS Output, 3.3V, Po=40mW@16Ω
-
−20
-
dB
D-Range −60dBFS Output, A-weighted, 2.4V
82
90
-
dB
−60dBFS Output, A-weighted, 3.3V
-
92
-
dB
S/N
A-weighted, 2.4V
82
90
-
dB
A-weighted, 3.3V
-
92
-
dB
Interchannel Isolation
60
80
-
dB
DC Accuracy
Interchannel Gain Mismatch
Gain Drift
Load Resistance (Note 9)
Load Capacitance
Output Voltage −3dBFS Output (Note 10)
0dBFS Output, 3.3V,
Po=40mW@16Ω
-
0.3
-
200
16
-
-
-
1.04
1.16
-
0.8
0.8
dB
-
ppm/°C
-
Ω
300
pF
1.28
Vpp
-
Vrms
Output Volume: (HPL/HPR pins)
Step Size
0 ∼ –30dB
0.1
1.5
2.9
dB
(HPG1-0 bits = “00”) –30 ∼ –63dB
0.1
3
5.9
dB
Gain Control Range
Max (ATT4-0 bits = “00H”)
-
0
-
dB
(HPG1-0 bits = “00”) Min (ATT4-0 bits = “1FH”)
-
−63
-
dB
Stereo Line Output: (LOUT/ROUT pins, R_L=10kΩ) (Note 11)
Analog Output Characteristics:
THD+N (0dBFS Output)
-
−60
−50
dB
S/N
A-weighted, 2.4V
80
87
-
dB
A-weighted, 3.3V
-
90
-
dB
DC Accuracy
Gain Drift
Load Resistance (Note 9)
Load Capacitance
Output Voltage (0dBFS Output) (Note 12)
-
200
10
-
-
-
1.32
1.47
-
ppm/°C
-
kΩ
25
pF
1.61
Vpp
Output Volume: (LOUT/ROUT pins)
Step Size
1
2
Gain Control Range
Max (ATTS3-0 bits = “FH”)
-
0
(LOG1-0 bit = “0”)
Min (ATTS3-0 bits = “0H”)
-
−30
3
dB
-
dB
-
dB
Note 8. DALHL=DARHR bits = “1”, LIN1HL=RIN1HL=LIN2HL=RIN2HL=LIN3HL=RIN3HL
=LIN1HR=RIN1HR=LIN2HR=RIN2HR=LIN3HR=RIN3HR bits = “0”.
Note 9. AC load.
Note 10. Output voltage is proportional to AVDD voltage.
When PMVREF bit = “0”, Vout = 0.48 x AVDD(typ)@−3dBFS.
When PMVREF bit = “1”, Vout = 0.52 x AVDD(typ)@0dBFS.
Note 11. DALL=DARR bits = “1”, LIN1L=RIN1L=LIN2L=RIN2L=LIN3L=RIN3L
=LIN1R=RIN1R=LIN2R=RIN2R=LIN3R=RIN3R bits = “0”
Note 12. Output voltage is proportional to AVDD voltage.
When PMVREF bit = “0”, Vout = 0.61 x AVDD(typ)@0dBFS.
When PMVREF bit = “1”, Vout = 0.46 x AVDD(typ)@0dBFS
MS0596-E-00
-7-
2007/04