AK4371 Datasheet, PDF (55/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4371]
Addr
0FH
Register Name
Lineout Select
R/W
Default
D7
RIN3R
R/W
0
D6
RIN3L
R/W
0
D5
LIN3R
R/W
0
D4
LIN3L
R/W
0
D3
RIN2R
R/W
0
D2
RIN2L
R/W
0
D1
LIN1R
R/W
0
D0
RIN1L
R/W
0
RIN1L: RIN1 signal is added to the left channel of the Lineout
0: OFF (default)
1: ON
LIN1R: LIN1 signal is added to the right channel of the Lineout
0: OFF (default)
1: ON
RIN2L: RIN2 signal is added to the left channel of the Lineout
0: OFF (default)
1: ON
RIN2R: RIN2 signal is added to the right channel of the Lineout
0: OFF (default)
1: ON
LIN3L: LIN3 signal is added to the left channel of the Lineout
0: OFF (default)
1: ON
LIN3R: LIN3 signal is added to the right channel of the Lineout
0: OFF(default)
1: ON
RIN3L: RIN3 signal is added to the left channel of the Lineout
0: OFF (default)
1: ON
RIN3R: RIN3 signal is added to the right channel of the Lineout
0: OFF (default)
1: ON
MS0596-E-00
- 55 -
2007/04