AK4371 Datasheet, PDF (36/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4371]
< Analog Mixing Circuit of Full-differential Mono input >
When LDIF=LIN1L=RIN1R bits = “1”, LIN1 and RIN1 pins becomes IN− and IN+ pins, respectively. IN− and IN+ pins
can be used as full-differential mono line input for analog mixing of LOUT/ROUT pins. It is not available to mix with
other signal source for LOUT/ROUT outputs.
If the path is OFF and the signal is input to the input pin, the input pin should be biased to a voltage equivalent to VCOM
voltage (= 0.475 x AVDD) externally. Figure 46 shows the external bias circuit example.
IN− pin
R1L
LIN1L bit
100k(typ)
LDIF bit
100k(typ)
−
+
LDIFH bit
LDIFM bit
Figure 25 HPL/R pins
Figure 28 MOUT pin
RL
RL
−
+
LOUT pin
IN+ pin
R1L
RIN1R bit
100k(typ)
−
+
RL
RL
−
+
ROUT pin
Figure 27. Summation circuit for stereo line output (Full-differential input, LOG bit = “0”)
■ Stereo Line Output (LOUT/ROUT pins) Volume
LOUT/ROUT volume is controlled by ATTS3-0 bits when LMUTE bit = “0” (+6dB ∼ −24dB or 0dB ∼ −30dB, 2dB step,
Table 26). Pop noise occurs when ATTS3-0 bits are changed.
LMUTE
ATTS3-0
LOG bit = “1”
(DAC Only)
LOG bit = “0”
FH
+6dB
0dB
EH
+4dB
−2dB
DH
+2dB
−4dB
0
CH
0dB
−6dB
:
:
:
:
:
:
1H
−22dB
−28dB
0H
−24dB
−30dB
1
x
MUTE
MUTE
Table 26. LOUT/ROUT Volume ATT values (x: Don’t care)
(default)
MS0596-E-00
- 36 -
2007/04