AK4371 Datasheet, PDF (44/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4371]
■ Serial Control Interface
(1) 3-wire Serial Control Mode (I2C pin = “L”)
Internal registers may be written to via the 3-wire μP interface pins (CSN, CCLK and CDTI). The data on this interface
consists of the Chip address (2-bits, Fixed to “01”), Read/Write (1-bit, Fixed to “1”, Write only), Register address (MSB
first, 5-bits) and Control data (MSB first, 8-bits). Address and data are clocked in on the rising edge of CCLK. For write
operations, the data is latched after a low-to-high transition of the 16th CCLK. CSN should be set to “H” once after 16
CCLKs for each address. The clock speed of CCLK is 5MHz(max). The value of the internal registers is initialized at
PDN pin = “L”.
CSN
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CDTI
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (Fixed to “01”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 35. 3-wire Serial Control I/F Timing
MS0596-E-00
- 44 -
2007/04