AK4371 Datasheet, PDF (19/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4371]
■ PLL Mode (PMPLL bit = “1”)
When PMPLL bit is “1”, a fully integrated analog phase locked loop (PLL) generates a clock that is selected by the
PLL4-0 and FS3-0 bits (Table 4, Table 5, Table 6). The PLL lock time is shown in Table 4, whenever the AK4371 is
supplied to a stable clocks after PLL is powered-up (PMPLL bit = “0” → “1”) or sampling frequency changes.
1) Setting of PLL Mode
Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Others
PLL4 PLL3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
Others
PLL PLL1 PLL0 Reference Clock
fs
R,C at VCOC PLL Lock
2
(Note _{R[Ω] C[F]} Time (typ)
32)
0
0
0 MCKI 11.2896MHz Type 1 10k 22n
20ms
0
0
1 MCKI 14.4MHz Type 1 10k 22n
20ms
0
1
0 MCKI 12MHz
Type 1 10k 47n
20ms
0
1
1 MCKI 19.2MHz Type 1 10k 22n
20ms
1
0
0 MCKI 15.36MHz Type 1 10k 22n
20ms
1
0
1 MCKI 13MHz
Type 1 15k 330n 100ms
1
1
0 MCKI 19.68MHz Type 1 10k 47n
20ms
1
1
1 MCKI 19.8MHz Type 1 10k 47n
20ms
0
0
0 MCKI 26MHz
Type 1 15k 330n 100ms
0
0
1 MCKI 27MHz
Type 1 10k 47n
20ms
0
1
0 MCKI 13MHz
Type 2 10k 22n
20ms
0
1
1 MCKI 26MHz
Type 2 10k 22n
20ms
1
0
0 MCKI 19.8MHz Type 3 10k 22n
20ms
1
0
1 MCKI 27MHz
Type 4 10k 22n
20ms
1
1
0 BICK
32fs
Table 6 6.8k 47n
20ms
1
1
1 BICK
64fs
Table 6 6.8k 47n
20ms
0
0
0 LRCK
fs
Table 6 6.8k 330n 80ms
N/A
Note 32. Refer to Table5 about Type1-4
Note 33 : Clock jitter is lower in Mode10 ~13 than Mode5, 7, 8 and 9, respectively.
Note 34. Modes 14~16 are available at Slave Mode only.
Table 4. Setting of PLL Mode (*fs: Sampling Frequency)
(default)
2) Setting of sampling frequency in PLL Mode
When PLL reference clock input is MCKI pin, the sampling frequency is selected by FS3-0 bits as defined in Table 5.
Mode
0
1
2
4
5
6
8
9
10
3, 7,
11-15
FS3 FS2 FS1 FS0
0000
0001
0010
0100
0101
0110
1000
1001
1010
Type 1
48kHz
24kHz
12kHz
32kHz
16kHz
8kHz
44.1kHz
22.05kHz
11.025kHz
fs
Type 2
Type 3
48.0007kHz 47.9992kHz
24.0004kHz 23.9996kHz
12.0002kHz 11.9998kHz
32.0005kHz 31.9994kHz
16.0002kHz 15.9997kHz
8.0001kHz 7.9999kHz
44.0995kHz 44.0995kHz
22.0498kHz 22.0498kHz
11.0249kHz 11.0249kHz
Type 4
47.9997kHz
23.9999kHz
11.9999kHz
31.9998kHz
15.9999kHz
7.9999kHz
44.0995kHz
22.0498kHz
11.0249kHz
(default)
Others
N/A
N/A
N/A
N/A
Table 5. Setting of Sampling Frequency (PLL reference clock input is MCKI pin)
MS0596-E-00
- 19 -
2007/04