AK4372 Datasheet, PDF (56/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4372]
Addr
08H
Register Name
Lineout Select 0
R/W
Default
D7
D6
D5
D4
0
LOG MINR MINL
RD R/W R/W R/W
0
0
0
0
DALL: DAC left channel output is added to the LOUT buffer amp.
0: OFF (default)
1: ON
DARR: DAC right channel output is added to the ROUT buffer amp.
0: OFF (default)
1: ON
LINL: Input signal to the LIN pin is added to the LOUT buffer amp.
0: OFF (default)
1: ON
RINR: Input signal to the RIN pin is added to the ROUT buffer amp.
0: OFF (default)
1: ON
MINL: Input signal to the MIN pin is added to the LOUT buffer amp.
0: OFF (default)
1: ON
MINR: Input signal to the MIN pin is added to the ROUT buffer amp.
0: OFF (default)
1: ON
LOG: DAC Æ LOUT/ROUT Gain
0: 0dB (default)
1: +6dB
D3
RINR
R/W
0
D2
LINL
R/W
0
D1
DARR
R/W
0
D0
DALL
R/W
0
Addr
09H
Register Name
Lineout ATT
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
ATTS3 ATTS2 ATTS1 ATTS0
RD
RD
RD
RD R/W R/W R/W R/W
0
0
0
0
0
0
0
0
ATTS3-0: Analog volume control for LOUT/ROUT (Table 26)
Default: LMUTE bit = “1”, ATTS3-0 bits = “0000” (MUTE)
Setting of ATTS3-0 bits is enabled at LMUTE bit is “0”.
MS0684-E-02
- 56 -
2008/12