AK4372 Datasheet, PDF (52/62 Pages) Asahi Kasei Microsystems – DAC with built-in PLL & HP-AMP

[AK4372]
■ Register Definitions
Addr
00H
Register Name
Power Management 0
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
PMPLL PMLO MUTEN PMHPR PMHPL PMDAC PMVCM
RD R/W R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
0
0
PMVCM: Power Management for VCOM Block
0: Power OFF (default)
1: Power ON
PMDAC: Power Management for DAC Blocks
0: Power OFF (default)
1: Power ON
When the PMDAC bit is changed from “0” to “1”, the DAC is powered-up to the current register values
(ATT value, sampling rate, etc).
PMHPL: Power Management for the left channel of the headphone-amp
0: Power OFF (default). The HPL pin settles to VSS1(0V).
1: Power ON
PMHPR: Power Management for the right channel of the headphone-amp
0: Power OFF (default). The HPR pin settles to VSS1(0V).
1: Power ON
MUTEN: Headphone Amp Mute Control
0: Mute (default). The HPL and HPR pins settles to VSS1(0V).
1: Normal operation. HPL and HPR pins go to 0.475 x AVDD.
PMLO: Power Management for Stereo Output
0: Power OFF (default) LOUT/ROUT pins change to Hi-Z.
1: Power ON
PMPLL: Power Management for PLL
0: Power OFF: EXT mode (default)
1: Power ON: PLL mode
Each block can be powered-down respectively by writing “0” in each bit of this address. When the PDN pin is “L”,
all blocks are powered-down regardless of setting of this address. In this case, register is initialized to the default
value.
When PMVCM, PMDAC, PMHPL, PMHPR, PMLO, PMMO, PMPLL and MCKO bits are “0”, all blocks are
powered-down. The register values remain unchanged. Power supply current is 20μA(typ) in this case. For fully
shut down (typ. 1μA), the PDN pin should be “L”.
MS0684-E-02
- 52 -
2008/12