AK4633EN Datasheet, PDF (50/83 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

[AK4633]
■ SOFTMUTE
Soft mute operation is performed in the digital input domain. When the SMUTE bit goes to “1”, the input signal is
attenuated by  (“0”) during the cycle of 245/fs (31msec@fs=8kHz). When the SMUTE bit is returned to “0”, the mute
is cancelled and the input attenuation gradually changes to 0dB during the cycle of 245/fs (31msec@fs=8kHz). If the soft
mute is cancelled within the cycle of 245/fs (31msec@fs=8kHz), the attenuation is discontinued and it is returned to 0dB.
The soft mute for Playback operation is effective for changing the signal source without stopping the signal transmission.
SMUTE bit
0dB
Attenuation
245/fs
(1)
245/fs
(3)
-
Analog Output
GD
GD
(2)
Figure 37. Soft Mute Function
(1) The input signal is attenuated by  (“0”) during the cycle of 245/fs (31msec@fs=8kHz).
(2) Analog output corresponding to digital input has group delay (GD).
(3) If the soft mute is cancelled within the cycle of 245/fs (31msec@fs=8kHz), the attenuation is discounted and returned
to 0dB within the same cycle.
■ BEEP Input
When the PMBP bit is set to “1”, the beep input is powered-up. When the BEEPS bit is set to “1”, the input signal from the
BEEP pin is output to Speaker-Amp. When the BEEPA bit is set to “1”, the input signal from the BEEP pin is output to the
mono line output amplifier. The external resister Ri adjusts the signal level of BEEP input. Table 34 shows the typical
gain example at R_i = 20k. This gain is in inverse proportion to R_i. It should be set MDIF bit to “0” expect PMBP bit =
BEEPA bit = BEEPS bit = “0”.
MS0447-E-06
Figure 38. Block Diagram of BEEP pin
SPKG1-0 bits
00
01
10
11
BEEP  SPP/SPN Gain
BEEP  AOUT Gain
+8dB
0dB
+10dB
0dB
+12dB
0dB
+14dB
0dB
Table 34. BEEP Input Gain at R_i = 20k
- 50 -
2015/10