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AK4633EN Datasheet, PDF (16/83 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP | |||
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[AK4633]
Parameter
Symbol
Min.
EXT Master Mode (Figure 2)
MCKI Frequency: 256fs
fCLK
1.8816
512fs
fCLK
3.7632
1024fs
fCLK
7.5264
Pulse Width Low
tCLKL
0.4/fCLK
Pulse Width High
tCLKH
0.4/fCLK
FCK Frequency (MCKI = 256fs)
fFCK
7.35
(MCKI = 512fs)
fFCK
7.35
(MCKI = 1024fs)
fFCK
7.35
Duty Cycle
dFCK
-
BICK: Period (BCKO1-0 bit= â00â)
tBCK
-
(BCKO1-0 bit= â01â)
tBCK
-
(BCKO1-0 bit= â10â)
tBCK
-
Duty Cycle
dBCK
-
Audio Interface Timing
DSP Mode: (Figure 3, Figure 4)
FCK âïâ to BICK âïâ (Note 22)
tDBF 0.5 x tBCK -40
FCK âïâ to BICK âï¯â (Note 23)
tDBF 0.5 x tBCK -40
BICK âïâ to SDTO (BCKP bit= â0â) tBSD
-70
BICK âï¯â to SDTO (BCKP bit= â1â) tBSD
-70
SDTI Hold Time
tSDH
50
SDTI Setup Time
tSDS
50
Except DSP Mode: (Figure 5)
BICK âï¯â to FCK Edge
tBFCK
-40
FCK to SDTO (MSB)
tFSD
-70
(Except I2S mode)
BICK âï¯â to SDTO
tBSD
-70
SDTI Hold Time
tSDH
50
SDTI Setup Time
tSDS
50
Note 21. Duty Cycle = (the width of âLâ ) / (the period of clock) x 100
Note 22. MSBS, BCKP bits = â00â or â11â
Note 23. MSBS, BCKP bits = â01â or â10â
Note 24. BICK rising edge must not occur at the same time as FCK edge.
Typ.
2.048
4.096
8.192
-
-
8
8
8
50
1/16fFCK
1/32fFCK
1/64fFCK
50
0.5 x tBCK
0.5 x tBCK
-
-
-
-
-
-
-
-
-
Max.
12.288
13.312
13.312
-
-
48
26
13
-
-
-
-
-
Unit
MHz
MHz
MHz
ns
ns
kHz
kHz
kHz
%
ns
ns
ns
%
0.5 x tBCK + 40 ns
0.5 x tBCK +40 ns
70
ns
70
ns
-
ns
-
ns
40
ns
70
ns
70
ns
-
ns
-
ns
MS0447-E-06
- 16 -
2015/10
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