AK4633EN Datasheet, PDF (44/83 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

[AK4633]
■ ALC Operation
The ALC (Automatic Level Control) is operated by ALC block. When ADCPF bit = “1”, ALC operation is enable for
recording path. When ADCPF bit = “0”, ALC operation is enable for playback path. ON/OFF of the ALC operation for
recording is controlled by ALC1 bit and the ON/OFF of ALC operation for playback is controlled by ALC2 bit.
1. ALC Limiter Operation
When the ALC limiter is enabled, and output exceeds the ALC limiter detection level (Table 23), the volume value is
attenuated by the amount defined by LMAT1-0 bits (Table 24) automatically.
When the ZELMN bit = “0”(zero crossing detection valid), the VOL value is changed by ALC limiter operation at the zero
crossing point or zero crossing timeout. Zero crossing timeout period is set by ZTM1-0 bit that is in common with ALC
recovery zero crossing timeout period’s setting (Table 25).
When the ZELMN bit = “1” (zero crossing detection invalid), VOL value has been changed immediately (period: 1/fs) by
ALC limiter operation. The attenuation for limiter operation is fixed to 1 step and not controlled by setting LMAT1-0 bits.
After finishing the attenuation operation, if ALC bit does not change to “0”, the operation repeats when the output signal
level exceeds the ALC limiter detection level.
LMTH1
0
0
1
1
LMTH0 ALC Limiter Detection Level ALC Recovery Waiting Counter Reset Level
0
ALC Output  2.5dBFS
2.5dBFS > ALC Output  4.1dBFS
1
ALC Output  4.1dBFS
4.1dBFS > ALC Output  6.0dBFS
0
ALC Output  6.0dBFS
6.0dBFS > ALC Output  8.5dBFS
1
ALC Output  8.5dBFS
8.5dBFS > ALC Output  12dBFS
Table 23. ALC Limiter Detection Level / Recovery Waiting Counter Reset Level
(default)
LMAT1
0
0
1
1
LMAT0
0
1
0
1
ALC1 Limiter ATT Step
ALC1 Output ALC1 Output ALC1 Output
 LMTH
 FS
 FS + 6dB
1
1
1
2
2
2
2
4
4
1
2
4
Table 24. ALC Limiter ATT Step Setting
ALC1 Output
 FS + 12dB
1
(default)
2
8
8
ZTM1
0
0
1
1
ZTM0
Zero Crossing Timeout Period
8kHz
16kHz
44.1kHz
0
128/fs
16ms
8ms
2.9ms
1
256/fs
32ms
16ms
5.8ms
0
512/fs
64ms
32ms
11.6ms
1
1024/fs
128ms
64ms
23.2ms
Table 25. ALC Zero Crossing Timeout Period Setting
(default)
MS0447-E-06
- 44 -
2015/10