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AK4633EN Datasheet, PDF (13/83 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP | |||
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[AK4633]
SWITING CHARACTERISTICS
(Ta = 25ï°C; AVDD =2.2 ï¾ 3.6V, DVDD =1.6 ï¾ 3.6V, SVDD =2.2 ï¾ 4.0V; CL=20pF)
Parameter
Symbol
Min.
Typ.
PLL Master Mode (PLL Reference Clock = MCKI pin) (Figure 2)
MCKI Input: Frequency
fCLK
11.2896
-
Pulse Width Low
tCLKL
0.4/fCLK
-
Pulse Width High
tCLKH
0.4/fCLK
-
MCKO Output:
Frequency
fMCK
-
256 x fFCK
Duty Cycle except fs=29.4kHz,32kHz
dMCK
40
50
fs=29.4kHz, 32kHz (Note 21) dMCK
-
33
FCK Output: Frequency
fFCK
8
-
Pulse width High
(DIF1-0 bits = â00â and FCKO bit = â1â) tFCKH
-
tBCK
Duty Cycle
(DIF1-0 bits â â00â or FCKO bit = â0â)
dFCK
-
50
BICK: Period (BCKO1-0 = â00â)
tBCK
-
1/16fFCK
(BCKO1-0 = â01â)
tBCK
-
1/32fFCK
(BCKO1-0 = â10â)
tBCK
-
1/64fFCK
Duty Cycle
dBCK
-
50
Audio Interface Timing
DSP Mode: (Figure 3, Figure 4)
FCK âïâ to BICK âïâ (Note 22)
tDBF 0.5 x tBCK -40 0.5 x tBCK
FCK âïâ to BICK âï¯â (Note 23)
tDBF 0.5 x tBCK -40 0.5 x tBCK
BICK âïâ to SDTO (BCKP = â0â)
tBSD
-70
-
BICK âï¯â to SDTO (BCKP = â1â)
tBSD
-70
-
SDTI Hold Time
tSDH
50
-
SDTI Setup Time
tSDS
50
-
Except DSP Mode: (Figure 5)
BICK âï¯â to FCK Edge
tBFCK
-40
-
FCK to SDTO (MSB)
tFSD
-70
-
(Except I2S mode)
BICK âï¯â to SDTO
tBSD
-70
-
SDTI Hold Time
tSDH
50
-
SDTI Setup Time
tSDS
50
-
Max.
27.0
-
-
-
60
-
48
-
-
-
-
-
-
0.5 x tBCK + 40
0.5 x tBCK +40
70
70
-
-
40
70
70
-
-
Unit
MHz
ns
ns
kHz
%
%
kHz
ns
%
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS0447-E-06
- 13 -
2015/10
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