LU3X54FTL Datasheet, PDF (6/52 Pages) Agere Systems – QUAD-FET for 10Base-T/100Base-TX/FX

LU3X54FTL
QUAD-FET for 10Base-T/100Base-TX/FX
Data Sheet
July 2000
Description (continued)
Either the on-chip 20 MHz clock synthesizer (default
clock) can be used, or H-DUPLED[A]/CLK20_SEL
(pin 198) can be pulled high (sensed on powerup and
reset) to select the external 20 MHz clock input.
The crystal specifications for the device are listed in
Table 1, and the crystal circuit is shown in Figure 3 and
Figure 4.
Table 1. LU3X54FTL Crystal Specifications
Parameter
Type
Frequency
Stability
Shunt Capacitor
Load Capacitor
Series Resistance
Requirement
Quartz Fundamental Mode
25 MHz
±25 ppm, 0—70 °C
7 pF
20 pF
<30 Ω
FX Mode
Each individual port of the LU3X54FTL can be oper-
ated in 100Base-FX mode by selecting it through the
pin program option RXLED[D:A]/FX_MODE_EN[D:A],
or through the register bit (register 29, bit 0).
When operating in FX mode, the twisted-pair I/O pins
are reused as the fiber-optic transceiver I/O data pins,
and the fiber-optic signal detect (FOSD) inputs are
enabled.
Figure 4 shows a typical FX port interface. Note that no
additional external components, excluding those
needed by the fiber transceiver, are required.
When a port is placed in FX mode, it will automatically
configure the port for 100Base-FX operation (and the
register bit control will be ignored) such that:
s The far-end fault signaling option will be enabled.
s The MLT-3 encoding/decoding will be disabled.
s Scrambler/descrambler will be disabled.
s Autonegotiation will be disabled.
s The signal detect inputs will be activated.
s 10Base-T will be disabled.
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Lucent Technologies Inc.