LU3X54FTL Datasheet, PDF (43/52 Pages) Agere Systems – QUAD-FET for 10Base-T/100Base-TX/FX

Data Sheet
July 2000
LU3X54FTL
QUAD-FET for 10Base-T/100Base-TX/FX
Timing Characteristics (Preliminary) (continued)
MDC
<R>
<Z>
<O>
MDIO
5-5312(F)
Note: MDIO turnaround (TA) time is a 2-bit time spacing between the register address field, and the data field of a frame to avoid drive conten-
tion on MDIO during a read transaction. During a write to the LU3X54FTL, these bits are driven to a 10 by the station. During a read, the
MDIO is not driven during the first bit time and is driven to a 0 by the LU3X54FTL during the second bit time.
Figure 11. MDIO During TA (Turnaround) of a Read Transaction
Table 29. MII Data Timing (25 pF Load)
Name
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
Parameter
RXD[3:0], RX_ER, RX_DV Valid to RX_CLK High
RX_CLK High to RXD[3:0], RX_DV, RX_ER Invalid
RX_CLK High
RX_CLK Low
RX_CLK Period
TX_CLK High
TX_CLK Low
TX_CLK Period
TXD, TX_EN, TX_ER, Setup to TX_CLK
TXD, TX_EN, TX_ER, Hold to TX_CLK
TXD, TX_EN, TX_ER, Setup to LSCLK*
TXD, TX_EN, TX_ER, Hold to LSCLK*
TX_CLK Skew from LSCLK
First Bit of J on TPIN± While Transmitting Data to COL
Assert (half-duplex mode)
First Bit of T Received on TPIN± While Transmitting to COL
Deasserted (half-duplex mode)
* 100 Mbits/s only.
Min
10/100
10/100
14/180
14/180
—
14/180
14/180
—
18/140
0/0
12
0
TBD
—
—
Typ
Max Unit
—
—
ns
—
—
ns
—
26/220 ns
—
26/220 ns
40
—
ns
—
26/220 ns
—
26/220 ns
40
—
ns
—
—
ns
—
—
ns
—
—
ns
—
—
ns
—
TBD ns
—
170 ns
—
210 ns
Lucent Technologies Inc.
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