LU3X54FTL Datasheet, PDF (42/52 Pages) Agere Systems – QUAD-FET for 10Base-T/100Base-TX/FX

LU3X54FTL
QUAD-FET for 10Base-T/100Base-TX/FX
Data Sheet
July 2000
Electrical Characteristics (continued)
Table 27. dc Characteristics (continued)
Parameter
10 Mbits/s Twisted Pair: Input Voltage
100 Mbits/s Twisted Pair: Input Voltage
10 Mbits/s Twisted Pair: Output Current
100 Mbits/s Twisted Pair: Output Current
Symbol
Min
Typ
Max
Unit
VDIFF
0.35
—
2.0
V
VDIFF
—
—
1.5
V
VDIFF
45
50
55
mA
VDIFF
19
20
21
mA
Timing Characteristics (Preliminary)
Table 28. MII Management Interface Timing (25 pF Load)
Name
Parameter
Min
Typ
Max
Unit
t1 MDIO Valid to Rising Edge of MDC (setup)
t2 Rising Edge of MDC to MDIO Invalid (hold)
t3 MDC Falling Edge to MDIO Valid (prop. delay)
t4 MDC High*
t5 MDC Low*
t6 MDC Period*
10
—
10
—
0
—
—
200
40
200
80
400
—
ns
—
ns
40
ns
—
ns
—
ns
—
ns
* When operating MDC above 6.25 MHz, MDC must be synchronous with LSCLK and have a setup time of 15 ns and a hold time of 5 ns,
with respect to LSCLK.
MDC
MDIO
t1
t2
Figure 9. MDIO Input Timing
MDC
MDIO
t6
t5
t4
t3
Figure 10. MDIO Output Timing
5-4959(F).r1
5-4960(F).c
42
Lucent Technologies Inc.