LU3X54FTL Datasheet, PDF (24/52 Pages) Agere Systems – QUAD-FET for 10Base-T/100Base-TX/FX

LU3X54FTL
QUAD-FET for 10Base-T/100Base-TX/FX
Data Sheet
July 2000
Pin Information (continued)
Table 7. Miscellaneous Pins (continued)
Pin
Signal
Type
Description
43
ISET_100
I Current Set 100 Mbits/s. An external resistor (nominally 24.9 kΩ) is
placed from this pin to ground to set the 100 Mbits/s TP driver transmit
output level.
114
REF10
I 10 MHz Input Clock. Optional reference clock for 10 Mbits/s repeater
mode for phase alignment. When used, TX_CLK will be driven from
REF10. If not used, let this pin float.
27
CLK20
I 20 MHz Input Clock. 20 MHz (±100 ppm) TTL level clock with
45%—55% duty cycle. If the internal 20 MHz clock synthesizer is being
used, ground this pin (default).
166
TXLED[D]/
I/O Transmit LED[D]. This pin indicates transmit activity on port D. Exter-
CARIN_EN
nal buffers are necessary to drive the LEDs.
Carrier Integrity Enable. At powerup or reset, if this pin is pulled high
through a 4.7 kΩ resistor, it will enable the carrier integrity function of
register 29, bit 3, if station management is unavailable.
This pin has an internal 50 kΩ pull-down resistor for normal operation
(CARIN_EN is disabled). This input and register bits [29.3] are ORed
together.
165
TXLED[C]/
I/O Transmit LED[C]. This pin indicates transmit activity on port C. Exter-
ENC_DEC_BYPASS
nal buffers are necessary to drive the LEDs.
Encoder/Decoder Bypass. At powerup or reset, if this pin is pulled
high through a 4.7 kΩ resistor, it will enable the ENC_DEC_BYPASS
function of register 29, bit 6, if station management is unavailable.
This pin has an internal 50 kΩ pull-down resistor for normal operation
(encoder/decoder ON). This input and the register bit [29.6] are ORed
together enabling the encoder/decoder bypass function for all four
channels.
164
TXLED[B]/
I/O Transmit LED[B]. This pin indicates transmit activity on port B. Exter-
SCRAM_DESC_BYPASS
nal buffers are necessary to drive the LEDs.
Scrambler/Descrambler Bypass. At powerup or reset, this pin may
be used to enable the SCRAM_DESC_BYPASS function by pulling this
pin high through a 4.7 kΩ resistor, if station management is unavail-
able. This is the same function as register 29, bit 4.
This pin has an internal 50 kΩ pull-down resistor for normal operation
(scrambler/descrambler ON). This input and the register bit [29.4] are
ORed together during powerup and reset.
162
TXLED[A]/
I/O Transmit LED[A]. This pin indicates transmit activity on port A. Exter-
REF_SEL
nal buffers are necessary to drive the LEDs.
Reference Select. At powerup, this pin may be used to select the
10 MHz reference input of pin REF10 by pulling it high through a 4.7 kΩ
resistor, if station management is unavailable. This is the same function
as register 30, bit 2.
This pin has an internal 50 kΩ pull-down resistor for normal operation
(REF10 not used). This input and the register bit are ORed together.
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