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Z90251 Datasheet, PDF (59/97 Pages) Zilog, Inc. – eZVision 200 Television Controllers with OSD
Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
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are ignored. When the Palette Mode value is 1, the Color Palette Selection Bits
are used, unless they are set to 0s. In that case, the values in the ROW_ATTR
register are used.
Bit 2, Horizontal Interrupt Enable, disables or enables the horizontal (HSYNC)
interrupt.
Bit 1, Vertical Interrupt, has different meanings depending on its Read and Write
status. In Read State, a value of 0 indicates that a vertical interrupt was not
issued; a value of 1 indicates that a vertical interrupt was issued. In Write State, a
value of 0 has no effect; a value of 1 resets the vertical interrupt flag.
Bit 0, Horizontal Interrupt, has different meanings depending on its status. In
Read State, a value of 0 indicates that a horizontal interrupt was not issued; a
value of 1 indicates that a horizontal interrupt was issued. In Write State, a value
of 0 has no effect; a value of 1 resets the horizontal interrupt flag.
When an interrupt is issued while another interrupt is processing, the last-issued
interrupt is pended. The interrupt-flag bit which is in service (the interrupt issued
first) must be cleared or serviced before the pended interrupt can be processed
(see SNDCLR(6)).
PS001301-0800