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Z90251 Datasheet, PDF (31/97 Pages) Zilog, Inc. – eZVision 200 Television Controllers with OSD
Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
23
Bit/
Field
Bit
Position R/W Value Description
OSD Blank
7
R/W 0 Enable OSD - POR default
1 Disable OSD
VRAM Mode
6, 5
R/W 00 Select 10-row buffer mode
01 Reserved
10 Select 2-row buffer mode
11 Reserved
Sync Polarity
4
R/W 0 Positive
1 Negative
Character Size
3
R/W 0 1X
1 2X
Vertical Retrace Blanking
2, 1, 0 R/W
Retrace Blanking
Bit 4, Sync Polarity, provides the polarity of the HSYNC and VSYNC signals. HSYNC
and VSYNC must have the same polarity (see Figure 8). This feature is designed to
provide flexibility for TV chassis designers.
Positive SYNC
Negative SYNC
Figure 8 Positive and Negative Sync Signals
Bit 3, Character Size, sets the size of the characters that are displayed. Character
sizes 1X, 2X, double width and double height are supported. The default value is
1X.
To change the size of the characters in a row, alter the value of the bit during the
previous horizontal interrupt. The character size of the first row is programmed
during vertical interrupt (VSYNC) processing. Character size is a row attribute.
Bits 2, 1, and 0, Vertical Retrace Blanking, set a time period when the OSD is
disabled while the electron gun returns from the bottom to the top of the screen,
and all VBLANK and RGB output are disabled. The blanking period is determined
by counting horizontal pulses according to the following formula:
Blanking Period=(4 x (Vertical Retrace Blanking)+2) x THL
THL: one horizontal period
The retrace blanking bits, OSD_CNTL (2,1,0) must be set to deactivate the
electron guns during the retrace period.
PS001301-0800