Z90251 Datasheet, PDF (11/97 Pages) Zilog, Inc. – eZVision 200 Television Controllers with OSD

Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
3
XTAL1
XTAL2
RESET
ADC0
ADC1
ADC2
ADC3
IRIN
P60
P61
P62
P63
PWM11
PWM6
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM9
PWM10
P50
P51
P52
P53
P54
P55
P56
Oscillator
WDT
RESET
Counter
Timer
Counter
Timer
4-Bit
ADC
CouIRnter
Port 6
PWM 11 & 6
(14-bit)
PWM 1
to
PWM 10
(6-bit)
Port 5
32 KB
Program ROM
or
32 KB
Program OTP
Internal
Microprocessor
Core
Register File
300 Byte
Character RAM
240 x 12-Bit
& 10 x 8-Bit
Character
ROM or OTP
18 KB by 7-Bit
Figure 2 Z90255 Block Diagram
Note: _{PWM 6 can be either a 6-bit or 14-bit output.}
Port 2
Port 4
I²C
Interface
On-Screen
Display
P20
P21
P22
P23
P24
P25
P26
P27
P40
P41
P42
P43
P44
P45
P46
P47
SCLK0
SDATA0
SCLK1
SDATA1
OSDX1
OSDX2
VH_SSYYNNCC
R
G
B
V_BLANK
HLFTN
The Z90255 takes full advantage of ZilogÕs Z8 expanded register file space to
offer greater flexibility in creating a user-friendly On-Screen Display (OSD).
Three basic addressing spaces are available: Program memory, Video RAM
(VRAM) and the Register file. The register file is composed of 300 bytes of
general-purpose registers, 16 control and status registers, one I/O port register
and three reserved registers.
PS001301-0800