Z90251 Datasheet, PDF (5/97 Pages) Zilog, Inc. – eZVision 200 Television Controllers with OSD

Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
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List of Figures
1 Z90255-Based TV System Application ........................................................ 2
2 Z90255 Block Diagram ................................................................................ 3
3 Z90255 and Z90251 Pin Assignments......................................................... 5
4 Code Development Environment ............................................................... 10
5 Register File Map....................................................................................... 12
6 Program Memory Map ............................................................................... 14
7 Stop Mode Recovery Source/Level Select ................................................ 21
8 Positive and Negative Sync Signals .......................................................... 23
9 Second Color Display ................................................................................ 28
10 Mesh On .................................................................................................... 29
11 Video Fade (Example) ............................................................................... 34
12 Character Pixel map in CGROM................................................................ 37
13 Example of a Multiple Character Icon ........................................................ 38
14 Smoothing Effect on 2X Character Size .................................................... 39
15 VRAM Data Path for 512 Character Set .................................................... 42
16 H_SYNC and V_SYNC Specification ............................................................... 52
17 Bidirectional Port Pin Pad Multiplexed with I2C Port ................................. 53
18 Pulse Width Modulator Timing Diagram, 6 Bit ........................................... 71
19 Pulse Width Modulator Timing Diagram, 14-Bit ......................................... 72
20 Analog Signals Generated from PWM Signals .......................................... 79
21 ADC Block Diagram ................................................................................... 82
22 Timing Requirements of External Inputs.................................................... 86
23 42-Lead Shrink Dual-in-line Package (SDIP) ............................................ 87
PS001301-0800