Z90251 Datasheet, PDF (27/97 Pages) Zilog, Inc. – eZVision 200 Television Controllers with OSD

Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
19
Table 6 Stop Mode Recovery (SMR) Register 0Bh: Bank F (SMR)
Bit
7
6
5
4
3
2
1
0
R/W
R
W
W
W
W
W
W
W
Reset
0
0
1
0
0
0
0
0
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Bit
Position R/W Value Description
Stop flag
7
Stop Recovery level
6
Stop Delay
5
Stop Mode Recover
4-2
Source
External Clock Divide by 2
1
SCLK/TCLK Divide by 16
0
R
0 POR
1 Stop Recovery
W
0 Low POR
1 High
W
0 Off
1 On POR
W 000 POR and /or External Reset
001 P63
010 P62
011 Must NOT be used
100 Must NOT be used
101 P27
110 P2 NOR 0-3
111 P2 NOR 0-7
W
0 SCLK/TCLK = XTAL/2 POR
1 SCLK/TCLK = XTAL
W
0 Off POR
1 On
SCLK/TCLK Divide-by-16
Select (bit O)
This bit controls a divide-by-16 prescaler of
SCLK/TCLK. The purpose of this control is to
reduce device power consumption selectively
during normal processor execution (SCLK
control) and/or Halt Mode (where TCLK
sources counter/timers and interrupt logic).
PS001301-0800