Z90251 Datasheet, PDF (19/97 Pages) Zilog, Inc. – eZVision 200 Television Controllers with OSD

Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
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2.2 Expanded Register File
The register file has been expanded to provide additional system control registers,
additional general purpose registers, and expanded mapping of peripheral
devices and I/O ports in the register address area.
The lower nibble of the Register Pointer (FDh) addresses the Expanded Register
File (ERF) Bank. The 0h value in the lower nibble identifies the Standard Register
File to be addressed. Any other value from 1h to Fh selects an ERF Bank. When
an ERF Bank is selected, register addresses from 00h to 0Fh access the sixteen
ERF Bank registers, which in effect replace the first sixteen locations of the
Z90255 Standard Register File. Only ERF Bank 4, ERF Bank 5, ERF Bank 6, ERF
Bank 7, ERF Bank A, ERF Bank B, ERF Bank C and ERF Bank F are
implemented in the Z90255 controller (Table 4).
2.3 Program Memory
The Z90255 has 32KB of program memory. Refer to Figure 6. The first 12 bytes of
the program memory are reserved for the interrupt vectors. These locations
contain six 16-bit vectors that correspond to interrupt and program control routine
addresses which are passed to the specified vector address. The IRQ0 vector is
permanently assigned to the IR interrupt request. The IRQ1 vector is permanently
assigned to the V_SYNC and H_SYNC interrupt request. Program memory starts at
address 000Ch after being reset.
PS001301-0800