Z84C90_12 Datasheet, PDF (28/56 Pages) Zilog, Inc. – KIO Serial/Parallel Counter/Timer

Z84C90 KIO Serial/Parallel Counter/Timer
Product Specification
21
Read Registers. SIO Channel B contains three read registers while Channel A contains
only two that can be read to obtain status information. To read the contents of a register
(other than RR0), the program must first write a pointer to WR0 in exactly the same man-
ner as a write register operation. The next I/O read cycle will place the contents of the
selected read register onto the data bus. See Figures 19 through 21.
D7 D6 D5 D4 D3 D2 D1 D0
Rx character available
Interrupt pending (Ch. A only)
Tx buffer empty
DCD
Sync/Hunt
CTS
*
Tx Underrun/EOM
Break/Abort
Note: *Used with External/Status Interrupt modes.
Figure 19. SIO Read Register 0
D7 D6 D5 D4 D3 D2 D1 D0
All sent
Field bits
Field bits
in previous in second previous
byte
byte
100
0
010
0
110
0
001
0
101
0
011
0
111
1
000
2
3
4
5
*
6
7
8
8
8
Parity error
Rx overrun error
CRC/Framing error
End of frame (SDLC)
Notes: *Residue data for eight Rx bits/character programmed.
**Used with a special receive condition mode.
Figure 20. SIO Read Register 1**
PS011804-0612
Register Programming