Z84C90_12 Datasheet, PDF (19/56 Pages) Zilog, Inc. – KIO Serial/Parallel Counter/Timer

Z84C90 KIO Serial/Parallel Counter/Timer
Product Specification
12
OSC. Oscillator (output). This output is a reference clock for the oscillator.
PA0–PA7. Port A Bus (bidirectional, tristated). One of the 8-bit ports of the PIO. PA0 is
the least-significant bit of the bus.
PB0–PB7. Port B Bus (bidirectional, tristated). One of the 8-bit ports of the PIO. PB₀ is
the least-significant bit of the bus. This port can also supply 1.5mA at 1.5V to drive Dar-
lington transistors.
PC0–PC7. Port C Bus (bidirectional, tristated). PC₀ is the least-significant bit of the bus.
These pins are multiplexed between the 8-bit PIA and additional modem control signals
for the serial channels.
RD. Read (input, active Low). When RD is active, a memory or I/O read operation is in
progress. RD is used with A0–A3, CS and IORQ to transfer data between the KIO and
CPU.
RESET. Reset (input, active Low). A Low on this pin forces the KIO into a Reset condi-
tion. This signal must be active for a minimum of three clock cycles. When the KIO is
reset, the following events occur:
• The PIO ports are in Mode 1 operation
• Handshakes are inactive and interrupts are disabled
• The PIA port is in Input mode and active
• CTC channel counting is terminated and interrupts are disabled
• SIO channels are disabled
• Marking with interrupts is disabled
All control registers must be rewritten after a hardware reset.
RTSA, RTSB. Request to Send (outputs, active Low). These signals are modem control
signals for their serial channels. They follow the inverse state programmed into their
respective serial channels, and are multiplexed with Port C, bits 4 and 3, respectively.
RxCA, RxCB. Receive Clock (inputs, active Low). These clocks are used to assemble the
data in the receiver shift register for their serial channels. Data is sampled on the rising
edge of the clock.
RxDA, RxDB. Receive Data (inputs, active High). These pins are the input data pins to the
receive shift register for their serial channels.
SYNCA, SYNCB. Synchronization (bidirectional, active Low). In the Asynchronous mode
of operation, these pins act much like the CTS and DCD pins. Transitions affect the Sync/
PS011804-0612
Pin Descriptions