Z84C90_12 Datasheet, PDF (10/56 Pages) Zilog, Inc. – KIO Serial/Parallel Counter/Timer

Z84C90 KIO Serial/Parallel Counter/Timer
Product Specification
3
Block Descriptions
Z84C20 Parallel Input/Output Logic Unit. This logic unit provides both TTL- and
CMOS-compatible interfaces between peripheral devices and a CPU through the use of
two 8-bit parallel ports. The CPU configures the logic to interface to a wide range of
peripheral devices with no external logic. Typical devices that are compatible with this
interface are keyboards, printers and EPROM/PAL programmers.
The parallel ports (designated Port A and Port B) are byte-wide and completely compati-
ble with the Z84C90 PIO (see Figure 2). These two ports feature several modes of opera-
tion: input, output, bidirectional or bit control. Each port features two handshake signals
(RDY and STB) which can be used to control data transfers. The RDY (ready) indicates
that the port is ready for data transfer while STB (strobe) is an input to the port that indi-
cates when data transfer has occurred. Each of the ports can also be programmed to inter-
rupt the CPU upon the occurrence of specified status conditions and generate unique
interrupt vectors when the CPU responds.
For more information about the operation of this portion of the logic, please refer to the
Z8420/Z84C20 PIO Product Specification (PS0180).
Data _CPU
Bus I/O
Control
Internal
Control
Logic
Port A
I/O
Data or
Control
Handshake
Internal Bus
Interrupt
Control
8
Port B
I/O
Data or
Control
Peripheral
Interface
Handshake
3
Interrupt Control Lines
Figure 2. Z84C20 Parallel Input/Output Block Diagram
PS011804-0612
Block Descriptions