Z84C90_12 Datasheet, PDF (23/56 Pages) Zilog, Inc. – KIO Serial/Parallel Counter/Timer

Z84C90 KIO Serial/Parallel Counter/Timer
Product Specification
16
Register Programming
This section describes how the bits within each of the Z84C90 KIO’s command registers
change their respective command register functions, as well as the effects of such changes.
PIO Registers
The PIO registers described in this section apply to channels A and B (additionally, see the
Register Address Decoding for the KIO section on page 13). For more information about
these PIO registers, please consult the Z80 CPU Peripherals User Manual (UM0081).
Interrupt Vector Word. When Bit 0 of the command register is cleared to 0, the command
register functions as the Interrupt Vector Word Register. The PIO logic unit is designed to
work with the Z80 CPU in Interrupt Mode 2. This word must be programmed if interrupts
are to be used; bit D0 must be 0. See Figure 10.
V7 V6 V5 V4 V3 V2 V1 V0
Identifies interrupt vector
User-supplied interrupt vector
Figure 10. PIO Interrupt Vector Word Register
Mode Control Word. When bits B2 to B0 are set to 1, the command register functions as
the Mode Control Word Register. Selects the port operating mode. This word is required
and can be written at any time. See Figure 11.
D7 D6 D5 D4 1 1 1 1
Identifies mode control word
Don’t care
Mode Select
0 0 Mode 0
0 1 Mode 1
1 0 Mode 2
1 1 Mode 3
Figure 11. PIO Mode Control Word Register
PS011804-0612
Register Programming