XC4013E-3PQ160I Datasheet, PDF (56/68 Pages) Xilinx, Inc – XC4000E and XC4000X Series Field Programmable Gate Arrays

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XC4000E and XC4000X Series Field Programmable Gate Arrays
Configuration Timing
The seven configuration modes are discussed in detail in
this section. Timing specifications are included.
Slave Serial Mode
In Slave Serial mode, an external signal drives the CCLK
input of the FPGA. The serial configuration bitstream must
be available at the DIN input of the lead FPGA a short
setup time before each rising CCLK edge.
The lead FPGA then presents the preamble data—and all
data that overflows the lead device—on its DOUT pin.
There is an internal delay of 0.5 CCLK periods, which
means that DOUT changes on the falling CCLK edge, and
the next FPGA in the daisy chain accepts data on the sub-
sequent rising CCLK edge.
Figure 51 shows a full master/slave system. An XC4000
Series device in Slave Serial mode should be connected as
shown in the third device from the left.
Slave Serial mode is selected by a <111> on the mode pins
(M2, M1, M0). Slave Serial is the default mode if the mode
pins are left unconnected, as they have weak pull-up resis-
tors during configuration.
NOTE:
M2, M1, M0 can be shorted
to Ground if not used as I/O
4.7 KΩ
4.7 KΩ
4.7 KΩ
M0 M1
M2
DOUT
XC4000E/X
MASTER
SERIAL
CCLK
DIN
PROGRAM
LDC
DONE
INIT
N/C
N/C
VCC
4.7 KΩ
XC1700D +5 V
CLK
DATA
CE
RESET/OE
VPP
CEO
(Low Reset Option Used)
M0 M1
M2
DIN
DOUT
CCLK
XC4000E/X,
XC5200
SLAVE
PROGRAM
DONE
INIT
VCC
4.7 KΩ
NOTE:
M2, M1, M0 can be shorted
to VCC if not used as I/O
4.7 KΩ
4.7 KΩ
M0 M1
M2
DIN
PWRDN
DOUT
CCLK
XC3100A
SLAVE
RESET
D/P
INIT
PROGRAM
X9025
Figure 51: Master/Slave Serial Mode Circuit Diagram
DIN
CCLK
DOUT
(Output)
Bit n
1 T_DCC
2 T_CCD
Bit n + 1
5 T_CCL
4 T_CCH
Bit n - 1
3 T_CCO
Bit n
X5379
Description
Symbol
Min
CCLK
DIN setup
DIN hold
DIN to DOUT
High time
Low time
Frequency
1
T_DCC
20
2
T_CCD
0
3
T_CCO
4
T_CCH
45
5
T_CCL
45
F_CC
Note: Configuration must be delayed until the INIT pins of all daisy-chained FPGAs are High.
Figure 52: Slave Serial Mode Programming Switching Characteristics
Max
30
10
Units
ns
ns
ns
ns
ns
MHz
6-60
May 14, 1999 (Version 1.6)