XC4013E-3PQ160I Datasheet, PDF(40/68 Page) Xilinx, Inc – XC4000E and XC4000X Series Field Programmable Gate Arrays

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XC4013E-3PQ160I Datasheet, PDF (40/68 Pages) Xilinx, Inc – XC4000E and XC4000X Series Field Programmable Gate Arrays

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Product Obsolete or Under Obsolescence

XC4000E and XC4000X Series Field Programmable Gate Arrays

IOB IOB IOB IOB IOB

IOB.T

DATA IN

IOB

TDI

BYPASS

INSTRUCTION REGISTER

IOB

M TDO

IOB.I

IOB.Q

IOB.T

IOB.I

Figure 41: XC4000 Series Boundary Scan Logic

DATAOUT

SHIFT/

CAPTURE

CLOCK DATA

UPDATE

EXTEST

X9016

Instruction Set

The XC4000 Series boundary scan instruction set also

includes instructions to conï¬gure the device and read back

the conï¬guration data. The instruction set is coded as

shown in Table 17.

Bit Sequence

The bit sequence within each IOB is: In, Out, 3-State. The

input-only M0 and M2 mode pins contribute only the In bit

to the boundary scan I/O data register, while the out-

put-only M1 pin contributes all three bits.

The ï¬rst two bits in the I/O data register are TDO.T and

TDO.O, which can be used for the capture of internal sig-

nals. The ï¬nal bit is BSCANT.UPD, which can be used to

drive an internal net. These locations are primarily used by

Xilinx for internal testing.

From a cavity-up view of the chip (as shown in XDE or

Epic), starting in the upper right chip corner, the boundary

scan data-register bits are ordered as shown in Figure 42.

The device-speciï¬c pinout tables for the XC4000 Series

include the boundary scan locations for each IOB pin.

BSDL (Boundary Scan Description Language) ï¬les for

XC4000 Series devices are available on the Xilinx FTP site.

Including Boundary Scan in a Schematic

If boundary scan is only to be used during conï¬guration, no

special schematic elements need be included in the sche-

matic or HDL code. In this case, the special boundary scan

pins TDI, TMS, TCK and TDO can be used for user func-

tions after conï¬guration.

To indicate that boundary scan remain enabled after conï¬g-

uration, place the BSCAN library symbol and connect the

TDI, TMS, TCK and TDO pad symbols to the appropriate

pins, as shown in Figure 43.

Even if the boundary scan symbol is used in a schematic,

the input pins TMS, TCK, and TDI can still be used as

inputs to be routed to internal logic. Care must be taken not

to force the chip into an undesired boundary scan state by

inadvertently applying boundary scan input patterns to

these pins. The simplest way to prevent this is to keep TMS

High, and then apply whatever signal is desired to TDI and

TCK.

6-44

May 14, 1999 (Version 1.6)

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