XC2VP2 Datasheet, PDF (315/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 12: FF1517 — XC2VP50 and XC2VP70
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Pin Description
IO_L82N_7/VREF_7
IO_L81P_7
IO_L81N_7
IO_L79P_7
IO_L79N_7
IO_L78P_7
IO_L78N_7
IO_L76P_7
IO_L76N_7/VREF_7
IO_L75P_7
IO_L75N_7
IO_L73P_7
IO_L73N_7
IO_L06P_7
IO_L06N_7
IO_L05P_7
IO_L05N_7
IO_L04P_7
IO_L04N_7/VREF_7
IO_L03P_7
IO_L03N_7
IO_L02P_7
IO_L02N_7
IO_L01P_7/VRN_7
IO_L01N_7/VRP_7
Pin
Number
G37
G33
G34
F38
F39
F36
F37
G35
F35
E37
E38
D38
D39
F33
E33
J31
H32
E34
D34
D35
C35
H31
G31
D33
C33
No Connects
XC2VP50
XC2VP70
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
7
VCCO_7
DS083 (v4.7) November 5, 2007
Product Specification
E39
U37
N36
J36
E36
Y35
U33
N32
J32
F32
U29
N28
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