XC2VP2 Datasheet, PDF (147/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
Table 6: FG456/FGG456 — XC2VP2, XC2VP4, and XC2VP7
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Pin Description
IO_L49N_3
IO_L49P_3
IO_L48N_3
IO_L48P_3
IO_L47N_3
IO_L47P_3
IO_L45N_3/VREF_3
IO_L45P_3
IO_L43N_3
IO_L43P_3
IO_L06N_3
IO_L06P_3
IO_L05N_3
IO_L05P_3
IO_L03N_3/VREF_3
IO_L03P_3
IO_L02N_3
IO_L02P_3
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
Pin Number
T22
T21
T20
T19
T18
U18
U22
U21
U20
U19
V22
V21
V20
V19
W22
W21
Y22
Y21
AA22
AB21
No Connects
XC2VP2 XC2VP4 XC2VP7
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
4
IO_L01N_4/BUSY/DOUT⁽¹⁾
4
IO_L01P_4/INIT_B
4
IO_L02N_4/D0/DIN ⁽¹⁾
4
IO_L02P_4/D1
4
IO_L03N_4/D2
4
IO_L03P_4/D3
4
IO_L05_4/No_Pair
4
IO_L06N_4/VRP_4
4
IO_L06P_4/VRN_4
4
IO_L07N_4
4
IO_L07P_4/VREF_4
4
IO_L09N_4
4
IO_L09P_4/VREF_4
4
IO_L67N_4
4
IO_L67P_4
4
IO_L69N_4
W18
W17
V17
V16
W16
Y16
V15
W15
Y15
U14
V14
W14
W13
U13
V13
Y13
DS083 (v4.7) November 5, 2007
Product Specification
www.xilinx.com
Module 4 of 4
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