XC2VP2 Datasheet, PDF(217/430 Page) Xilinx, Inc – Summary of Features

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XC2VP2 Datasheet, PDF (217/430 Pages) Xilinx, Inc – Summary of Features

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Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information

Table 9: FF896 â XC2VP7, XC2VP20, XC2VPX20, and XC2VP30

Pin Description

Bank

Virtex-II Pro devices

XC2VPX20

(if Different)

Pin

Number

N/A

M0

AD24

N/A

M1

AC24

N/A

M2

AC23

N/A

TCK

G7

N/A

TDI

F26

N/A

TDO

F5

N/A

TMS

H8

N/A

PWRDWN_B

AD7

N/A

HSWAP_EN

H23

N/A

RSVD

D6

N/A

VBATT

H7

N/A

DXP

H24

N/A

DXN

D25

N/A

AVCCAUXTX4

B26

N/A

VTTXPAD4

B27

N/A

TXNPAD4

A27

N/A

TXPPAD4

A26

N/A

GNDA4

C25

N/A

RXPPAD4

A25

N/A

RXNPAD4

A24

N/A

VTRXPAD4

B25

N/A

AVCCAUXRX4

B24

N/A

AVCCAUXTX6

B19

N/A

VTTXPAD6

B20

N/A

TXNPAD6

A20

N/A

TXPPAD6

A19

N/A

GNDA6

C19

N/A

RXPPAD6

A18

N/A

RXNPAD6

A17

N/A

VTRXPAD6

B18

N/A

AVCCAUXRX6

B17

N/A

AVCCAUXTX7

B13

N/A

VTTXPAD7

B14

N/A

TXNPAD7

A14

N/A

TXPPAD7

A13

N/A

GNDA7

C12

XC2VP7

No Connects

XC2VP20,

XC2VPX20 XC2VP30

DS083 (v4.7) November 5, 2007

Product Specification

www.xilinx.com

Module 4 of 4

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