XC2VP2 Datasheet, PDF (19/430 Pages) Xilinx, Inc – Summary of Features

R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description
ing character, and remembers its location in the buffer. At
some point, one transceiver designated as the master
instructs all the transceivers to align to the channel bonding
character "P" (or to some location relative to the channel
bonding character).
After this operation, words transmitted to the FPGA fabric
are properly aligned: RRRR, SSSS, TTTT, and so forth, as
shown in the bottom-right portion of Figure 7. To ensure that
the channels remain properly aligned following the channel
bonding operation, the master transceiver must also control
the clock correction operations described in the previous
section for all channel-bonded transceivers.
Transmitter Buffer
The transmitter's buffer write pointer (TXUSRCLK) is fre-
quency-locked to its read pointer (REFCLK). Therefore,
clock correction and channel bonding are not required. The
purpose of the transmitter's buffer is to accommodate a
phase difference between TXUSRCLK and REFCLK. A
simple FIFO suffices for this purpose. A FIFO depth of four
will permit reliable operation with simple detection of over-
flow or underflow, which could occur if the clocks are not fre-
quency-locked.
In Transmitters:
Full word SSSS sent over four channels, one byte per channel
PQRS T
Channel (lane) 0
PQRS T
Channel (lane) 1
PQRS T
Channel (lane) 2
PQRS T
Channel (lane) 3
Read
In Receivers:
RXUSRCLK
PQRS T
Read
RXUSRCLK
PQRS T
PQRS T
PQRS T
PQRS T
PQRS T
PQRS T
Before channel bonding
PQRS T
After channel bonding
DS083-2_16_010202
Figure 7: Channel Bonding (Alignment)
RocketIO X Configuration
This section outlines functions that can be selected or con-
trolled by configuration. Xilinx implementation software sup-
ports the transceiver primitives shown in Table 3.
Table 3: Supported RocketIO X Transceiver Primitives
Primitive
Description
GT10_CUSTOM
Fully customizable by user
GT10_OC48_1
SONET OC-48, 1-byte data path
GT10_OC48_2
SONET OC-48, 2-byte data path
GT10_OC48_4
SONET OC-48, 4-byte data path
GT10_PCI_EXPRESS_1 PCI Express, 1-byte data path
GT10_PCI_EXPRESS_2 PCI Express, 2-byte data path
GT10_PCI_EXPRESS_4 PCI Express, 4-byte data path
GT10_INFINIBAND_1 Infiniband, 1-byte data path
GT10_INFINIBAND_2 Infiniband, 2-byte data path
GT10_INFINIBAND_4 Infiniband, 4-byte data path
DS083 (v4.7) November 5, 2007
Product Specification
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