DS586 Datasheet, PDF (21/21 Pages) Xilinx, Inc – LogiCORE IP XPS HWICAP

LogiCORE IP XPS HWICAP (v5.01a)
Revision History
Date
08/23/07
10/18/07
04/24/09
06/03/09
11/19/09
05/02/10
7/23/10
3/1/11
6/22/11
Version
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.7.1
Revision
Initial release
Added Table 16 Performance and Resource Utilization Benchmarks on Virtex-5.
Replaced references to supported device families and tool name(s) with hyperlink to PDF file.
Added ICAP_Clk to the design to provide separate clock for ICAP and updated top-level block
diagram and I\O Signals table; replaced SRL FIFO’s with FIFO Generator based Asynchronous
FIFOs; added parameter C_BRAM_SRL_FIFO_TYPE to select the FIFO type shown in the
Design Parameters table; updated the Device Utilization and Performance Benchmarks section
with the latest values.
Virtex-6 family support added; added Table notes 4 and 5 to the Design Parameters table. added.
Spartan-6 family support added.
Updated for 12.2 release.
Updated for the 13.1 release.
Documentation update only.
• Added text about FIFO data width to HWICAP Module section.
• Updated Read or Configuration (write) steps in User Application Hints section.
Notice of Disclaimer
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Information. All specifications are subject to change without notice. XILINX EXPRESSLY DISCLAIMS ANY WARRANTY
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Xilinx.
DS586 June 22, 2011
www.xilinx.com
21
Product Specification