DS586 Datasheet, PDF (18/21 Pages) Xilinx, Inc – LogiCORE IP XPS HWICAP

LogiCORE IP XPS HWICAP (v5.01a)
XPS HWICAP resource utilization for various parameter combinations measured with the Spartan-6 FPGA as the
target device are detailed in Table 18.
Table 18: Performance and Resource Utilization Benchmarks on the Spartan-6 FPGA (xc6slx45t-fgg484-1)
Parameter Values
Device Resources
Performance
0
1
32
32
128
128
277
622
720
100
20
0
4
64
64
256
128
326
646
803
100
20
0
8
64
64
512
128
367
662
930
100
20
1
8
64
128
512
128
279
632
684
100
20
1
8
128
128
1024
128
283
648
701
100
20
System Performance
To measure the system performance (Fmax) of the XPS HWICAP core, it was added to a Virtex-4 FPGA system, a
Virtex-5 FPGA system, Virtex-6 FPGA system, and a Spartan-6 FPGA system as shown in Figure 15, Figure 16,
Figure 17 and Figure 18.
Because the XPS HWICAP core will be used with other design modules in the FPGA, the utilization and timing
numbers reported in this section are estimates only. When this core is combined with other designs in the system,
the utilization of FPGA resources and timing of the core design will vary from the results reported here.
X-Ref Target - Figure 15
PLBV46
PLBV46
MPMC
XPS CDMA XPS CDMA
Device Under
Test (DUT)
IPLB1 DPLB1
DPLB0
PowerPC 405
Processor ^IPLB0
PLBV46
XPS BRAM XPS INTC
XPS GPIO
XPS UART
Lite
DS586_15
Figure 15: Virtex-4 FX FPGA System with the XPS HWICAP as the DUT
DS586 June 22, 2011
www.xilinx.com
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Product Specification