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DS669 Datasheet, PDF (15/28 Pages) Xilinx, Inc – AXI Interface Based
AXI Interface Based KC705 Embedded Kit MicroBlaze Processor Subsystem Data Sheet
Number used as ISERDESE2s:
Number of ODELAYE2/ODELAYE2_FINEDELAYs:
Number of OLOGICE2/OLOGICE3/OSERDESE2s:
Number used as OLOGICE2s:
Number used as OLOGICE3s:
Number used as OSERDESE2s:
Number of PHASER_IN/PHASER_IN_PHYs:
Number used as PHASER_INs:
64
0 out of
212 out of
109
0
103
8 out of
0
150 0%
500 42%
40 20%
Number used as PHASER_IN_PHYs:
Number of LOCed PHASER_IN_PHYs:
8
8 out of
8 100%
Number of PHASER_OUT/PHASER_OUT_PHYs:
Number used as PHASER_OUTs:
Number used as PHASER_OUT_PHYs:
Number of LOCed PHASER_OUT_PHYs:
Number of BSCANs:
Number of BUFHCEs:
Number of BUFRs:
Number of CAPTUREs:
Number of DNA_PORTs:
11 out of
0
11
11 out of
1 out of
0 out of
1 out of
0 out of
0 out of
40 27%
11 100%
4 25%
168 0%
40 2%
1 0%
1 0%
Number of DSP48E1s:
Number of EFUSE_USRs:
Number of FRAME_ECCs:
Number of GTXE2_CHANNELs:
Number of GTXE2_COMMONs:
Number of ICAPs:
Number of IDELAYCTRLs:
Number of IN_FIFOs:
Number of LOCed IN_FIFOs:
19 out of
0 out of
0 out of
0 out of
0 out of
0 out of
3 out of
8 out of
8 out of
840 2%
1 0%
1 0%
16 0%
4 0%
2 0%
10 30%
40 20%
8 100%
Number of MMCME2_ADVs:
Number of LOCed MMCME2_ADVs:
Number of OUT_FIFOs:
Number of LOCed OUT_FIFOs:
Number of PCIE_2_1s:
Number of PHASER_REFs:
Number of LOCed PHASER_REFs:
Number of PHY_CONTROLs:
Number of LOCed PHY_CONTROLs:
2 out of
1 out of
11 out of
11 out of
0 out of
3 out of
3 out of
3 out of
3 out of
10 20%
2 50%
40 27%
11 100%
1 0%
10 30%
3 100%
10 30%
3 100%
Number of PLLE2_ADVs:
Number of LOCed PLLE2_ADVs:
Number of STARTUPs:
Number of XADCs:
1 out of
1 out of
0 out of
1 out of
10 10%
1 100%
1 0%
1 100%
Note: Device resource utilization results are indicative and are dependent on the implementation tool versions. Exact results can vary.
System Features
Processor Block
• MicroBlaze 32-bit processor with 8 KB I-cache and 8 KB D-cache
• Hardware barrel shifter
• MMU:
• Provides full MMU functionality
• Controls effective-address to physical-address mapping
• Provides memory protection with two memory protection zones
• 8 KB local memory for instructions and data
• Debug module
• Interrupt controller
• Dual 32-bit timer/counter
DS669 (v2.0) April 23, 2013
www.xilinx.com
Product Specification
15