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DS506 Datasheet, PDF (13/19 Pages) Xilinx, Inc – LogiCORE IP Endpoint v3.7
LogiCORE IP Endpoint v3.7 for PCI Express®
Table 6: Configuration Interface Signals (Cont’d)
Name
Direction
Description
fast_train_simulation_only
Input
Fast Train: Should only be asserted for simulation. Training
counters are lowered when this input is asserted (set to “1”) to
allow the simulation to train faster. Do not assert this input when
using the core in hardware. Doing so will cause the core to fail
link training.
two_plm_auto_config
Input
Two-PLM Auto-Config: Used only for simulation; forces device
to act as a down stream device for link training purposes. This
signal should only be set to “11,” if in simulation, two endpoint
cores are connected back-to-back. When using the provided
downstream port model for simulation, this signal should be set
to “00” on the endpoint core under test. This signal should be
set to “00” when using the core in hardware as an endpoint
device. Any other setting in hardware is not supported.
Transaction Interface
The Transaction (TRN) interface provides a mechanism for the user design to generate and consume
TLPs. The signal names and signal descriptions, as well as the clock cycles and event descriptions for
both interfaces, are described in Table 7 through Table 10 and illustrated in Figure 2 and Figure 3.
Transmit TRN Interface
Table 7 defines the transmit (Tx) TRN interface signals.
Table 7: Transmit Transaction Interface Signals
Name
Direction
Description
trn_tsof_n
Input
Transmit Start-of-Frame (SOF): Signals the start of a packet. Active low.
trn_teof_n
Input
Transmit End-of-Frame (EOF): Signals the end of a packet. Active low.
trn_td[W-1:0]
Input
Transmit Data: Packet data to be transmitted.
Product Name
Data Bus Width (W)
1-lane 64-bit Endpoint
64
4-lane 64-bit Endpoint
64
8-lane 64-bit Endpoint
64
1-lane 32-bit Endpoint
32
4-lane 32-bit Endpoint
32
trn_trem_n[7:0](1)
Input
Transmit Data Remainder: Valid only if both trn_teof_n and
trn_tdst_rdy_n are asserted. Legal values are:
0000_0000b = packet data on all of trn_td[63:0],
0000_1111b = packet data only on trn_td[63:32]
trn_terrfwd_n
Input
Transmit Error Forward: Marks the current packet in progress as error-
poisoned. Can be asserted any time between SOF and EOF, inclusive.
Active low.
trn_tsrc_rdy_n
Input
Transmit Source Ready: Indicates that the user application is presenting
valid data on trn_td[W-1:0]. Active low.
trn_tdst_rdy_n
Output
Transmit Destination Ready: Indicates that the core is ready to accept
data on trn_td[W-1:0]. Active low.
Simultaneous assertion of trn_tsrc_rdy_n and trn_tdst_rdy_n marks
successful transfer of data on trn_td[W-1:0].
trn_tsrc_dsc_n
Input
Transmit Source Discontinue: Indicates that the user application is
aborting the current packet. Active low.
DS506 April 19, 2010
www.xilinx.com
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Product Specification