W972GG6JB-18-TR Datasheet, PDF (83/87 Pages) Winbond – 16M 8 BANKS 16 BIT DDR2 SDRAM

W972GG6JB
11.27 Burst write with Auto-precharge (WR + tRP Limit): WL=4, WR=2, BL=4, tRP=3
T0
T3
T4
T5
T6
T7
T8
T9
T11
CLK/CLK
CMD
Post CAS
WRA Bank A
A10 = 1
DQS,
DQS
DQ's
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Completion of the Burst Write
Auto-precharge Begins
WL = RL - 1 = 4
DIN DIN DIN DIN
A0
A1
A2
A3
≥ WR
≥ tRC
tRP min.
Bank A
Activate
11.28 Self Refresh Timing
T0
T1
tCK
tCH tCL
CLK
CLK
CKE
ODT
CMD
T2
T3
VIL(ac)
tIS
tAOFD
T4
T5
T6
tRP
VIL(ac)
tIS
tIH
tIS tIH
VIH(ac)
VIL(ac)
Self
Refresh
VIH(dc)
VIL(dc)
Tm
Tn
VIH(ac)
≥ tXSNR
≥ tXSRD
tIH
tIS
tIH
NOP
Non-Read
Command
NOP
Read
Command
Notes:
1. Device must be in the “All banks idle” state prior to entering Self Refresh mode.
2. ODT must be turned off tAOFD before entering Self Refresh mode, and can be turned on again when tXSRD timing is
satisfied.
3. tXSRD is applied for a Read or a Read with Auto-precharge command. tXSNR is applied for any command except a Read or a
Read with Auto-precharge command.
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Publication Release Date: Jul. 28, 2014
Revision: A03