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| W972GG6JB-18-TR Datasheet, PDF (64/87 Pages) Winbond – 16M 8 BANKS 16 BIT DDR2 SDRAM | |||
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W972GG6JB
DQS
DQS
VDDQ
tDS
tDH
VIH(ac)min
VIH(dc)min
DC to VREF
region
VREF(dc)
VIL(dc)max
nominal
slew rate
tDS tDH
nominal
slew rate
DC to VREF
region
VIL(ac)max
VSS
ÎTR
ÎTF
Hold Slew Rate VREF(dc) - VIL(dc)max
Rising Signal =
ÎTR
Hold Slew Rate VIH(dc)min - VREF(dc)
Falling Signal =
ÎTF
Figure 26 â Illustration of nominal slew rate for tDH (differential DQS, DQS )
- 64 -
Publication Release Date: Jul. 28, 2014
Revision: A03
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