W972GG6JB-18-TR Datasheet, PDF (17/87 Pages) Winbond – 16M 8 BANKS 16 BIT DDR2 SDRAM

W972GG6JB
For proper operation of adjust mode, WL = RL - 1 = AL + CL - 1 clocks and tDS/tDH should be met as
shown in Figure 7. For input data pattern for adjustment, DT0 - DT3 is a fixed order and is not affected
by burst type (i.e., sequential or interleave).
CLK
CLK
CMD
EMRS
NOP
WL
DQS_in
NOP
NOP
DQS
tDS tDH
NOP
DQ_in
DT0 DT1 DT2 DT3
NOP
WR
NOP
EMRS
NOP
DM
OCD adjust mode
OCD calibration mode exit
Figure 7 – OCD Adjust Mode
8.2.3.3 Drive Mode
Drive mode, both Drive (1) and Drive (0), is used for controllers to measure DDR2 SDRAM Driver
impedance. In this mode, all outputs are driven out tOIT after “enter drive mode” command and all
output drivers are turned-off tOIT after “OCD calibration mode exit” command as shown in Figure 8.
CLK
CLK
CMD
DQS
DQS
DQ
EMRS
tOIT
NOP
NOP
NOP
NOP
EMRS
tOIT
DQS high & DQS low for Drive (1), DQS low & DQS high for Drive (0)
NOP
HI-Z
DQs high for Drive (1)
DQs low for Drive (0)
NOP
NOP
Enter Drive mode
OCD calibration mode exit
Figure 8 – OCD Drive Mode
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Publication Release Date: Jul. 28, 2014
Revision: A03