W972GG6JB-18-TR Datasheet, PDF (2/87 Pages) Winbond – 16M 8 BANKS 16 BIT DDR2 SDRAM

W972GG6JB
8.6.1
Burst read operation followed by precharge.....................................................................27
8.6.2
Burst write operation followed by precharge ....................................................................27
8.7 Auto-precharge operation ...................................................................................................................27
8.7.1
Burst read with Auto-precharge .......................................................................................28
8.7.2
Burst write with Auto-precharge .......................................................................................28
8.8 Refresh Operation...............................................................................................................................29
8.9 Power Down Mode..............................................................................................................................29
8.9.1
Power Down Entry ...........................................................................................................30
8.9.2
Power Down Exit..............................................................................................................30
8.10 Input clock frequency change during precharge power down .............................................................30
9.
9.1
9.2
9.3
9.4
9.5
OPERATION MODE ...........................................................................................................................31
Command Truth Table ........................................................................................................................31
Clock Enable (CKE) Truth Table for Synchronous Transitions ...........................................................32
Data Mask (DM) Truth Table...............................................................................................................32
Function Truth Table ...........................................................................................................................33
Simplified Stated Diagram...................................................................................................................36
10.
ELECTRICAL CHARACTERISTICS ...................................................................................................37
10.1 Absolute Maximum Ratings ................................................................................................................37
10.2 Operating Temperature Condition.......................................................................................................37
10.3 Recommended DC Operating Conditions ...........................................................................................37
10.4 ODT DC Electrical Characteristics ......................................................................................................38
10.5 Input DC Logic Level...........................................................................................................................38
10.6 Input AC Logic Level ...........................................................................................................................38
10.7 Capacitance ........................................................................................................................................39
10.8 Leakage and Output Buffer Characteristics ........................................................................................39
10.9 DC Characteristics ..............................................................................................................................40
10.10
IDD Measurement Test Parameters ..........................................................................................42
10.11
AC Characteristics.....................................................................................................................43
10.11.1
AC Characteristics and Operating Condition for -18 speed grade ...................................43
10.11.2
AC Characteristics and Operating Condition for -25/25I/-3/-3I speed grade ....................45
10.12
AC Input Test Conditions...........................................................................................................66
10.13
Differential Input/Output AC Logic Levels ..................................................................................66
10.14
AC Overshoot / Undershoot Specification .................................................................................67
10.14.1
AC Overshoot / Undershoot Specification for Address and Control Pins: ........................67
10.14.2
AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask pins:..........67
11.
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
11.11
11.12
11.13
11.14
TIMING WAVEFORMS .......................................................................................................................68
Command Input Timing.......................................................................................................................68
ODT Timing for Active/Standby Mode .................................................................................................69
ODT Timing for Power Down Mode ....................................................................................................69
ODT Timing mode switch at entering power down mode....................................................................70
ODT Timing mode switch at exiting power down mode ......................................................................71
Data output (read) timing ....................................................................................................................72
Burst read operation: RL=5 (AL=2, CL=3, BL=4) ................................................................................72
Data input (write) timing ......................................................................................................................73
Burst write operation: RL=5 (AL=2, CL=3, WL=4, BL=4) ....................................................................73
Seamless burst read operation: RL = 5 ( AL = 2, and CL = 3, BL = 4) ......................................74
Seamless burst write operation: RL = 5 ( WL = 4, BL = 4).........................................................74
Burst read interrupt timing: RL =3 (CL=3, AL=0, BL=8) .............................................................75
Burst write interrupt timing: RL=3 (CL=3, AL=0, WL=2, BL=8) ..................................................75
Write operation with Data Mask: WL=3, AL=0, BL=4) ...............................................................76
Publication Release Date: Jul. 28, 2014
Revision: A03
-2-