W681307 Datasheet, PDF (78/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM

W681307
ISP_EN
ISP hardware module generates
ISP hardware module generates
ISP_RST
Program set ISP_EN
HW_ISP_EN
ISP Program completes the ISP mode
Hardware switch to run the
internal mask ISP ROM code of
baseband. And the all the
internal registers of baseband
chip will band-switch to P1.7.
Hardware switch to normal
operation to run the external
flash ROM code.
Baseband external Flash
ROM code operation
MCU
into
idle
mode
RST
Baseband internal mask ROM ISP code operation to
download program code to external flash from USB or
UART port dependent on the ISP command source
MCU
into
idle
mode
RST
Baseband
external Flash
ROM code
operation
Figure 11-6 The software ISP operation procedure
11.6.3
ISP_CTRL (Hardware & Watchdog Reset Control Register)
Address
0x1900
Access Mode Value At Reset Nominal Value
RW
0x00
Bit 7
ISP_EN
Bit 6
Reserved
Bit 5
Reserved
Bit 4
Reserved
Bit 3
Reserved
Bit 2
Reserved
Bit 1
USB_ISP
Bit 0
UART_ISP
This ISP control register is provided the In-system-programming function to update the system program code without modification
hardware. This function can be enabled by the bit 7 of ISP_CTRL control register. And the enable command which is come from the
internal UART port or USB interface.
UART_ISP
This bit is reserved for ISP mask rom program recognition which type ISP mode is enabled. When ISP enabled command
is come from internal UART port. Then the normal program will set this bit for recognition in ISP mode period before
enabled ISP_EN bit. And download program data will come from UART port in the ISP programming period.
USB_ISP
The bit function is the same as UART_ISP.
ISP_EN
When set this bit will enable ISP mode to program the external flash ROM via the internal USB interface or UART port.
11.6.4
Specific Register
Address
0x1901
Access Mode Value At Reset Nominal Value
RW
0x00
Bit 7
Blocked
(for test modes)
Bit 6
Reserved
Bit 5
Reserved
Bit 4
Reserved
Bit 3
Reserved
Bit 2
Reserved
Bit 1
Reserved
Bit 0
Reserved
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Publication Release Date: May, 2007
Revision 1.3