W681307 Datasheet, PDF (32/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM

W681307
7.3.13
VAG Selection
Address
0x1506
Name
VAG Selection
Mode
R/W
Value At
Reset
Function
0x00 Select the reference voltage at pin VAG.
7.3.14
Address
0x1507
0x1508
0x1509
CODEC Control Register Overview
Name
TG1 Gain Register
PO Gain Register
CODEC_CTRL
Mode
R/W
R/W
R/W
Value At
Reset
0x00
0x00
0x00
Function
Set TG1 gain from 0dB, 6dB, 12dB, 18dB to 24dB or bypass
and doublt you selected gain. TG2 internal gain.
Set PO gain from -4dB, 2dB, 8dB or bypass
OP amp PO power down, CODEC analog loopback, CODEC
transmitter gain
7.3.15
Specific Registers
Address
0x150A
0x150B
Name
Specific Register
Specific Register
Mode
R/W
R/W
Value At
Reset
0x00
0x00
Function
Blocked for test modes
Blocked for test modes
7.3.16
Address
0x150C
0x150D
0x150E
0x150F
0x1510
0x1511
0x1512
0x1513
0x1514
0x1515
0x1516-
0x1517
Test Cases and Debugging Registers Overview
Name
RECEIVE_DIAG
Specific Register
EnAllClock
CODEC_Test_Sel
RSSI Mode
BGP_LPF_EN
CODEC Status Indicator
Bandgap Voltage Adjustment
Specific Register
Linear Regulator Voltage
Controller Register
Reserved
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Value At
Reset
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Function
Register for diagnostic and output pins switch
Blocked for test modes
Enable all of test clock
Digital CODEC part test mode selection
Use for ISP mode protect
Enable the low pass filter at the BGP generator
CODEC DAC ADC FIFO point indicator
Bandgap Voltage Adjustment
Blocked for test modes
The adjustment possibilities of output voltage of the linear
regulator have been built in to compensate the bandgap
variation in process.
7.3.17
Address
0x1518
Charge Park Detection
Name
Core PWR_Det
Mode
R
Value At
Reset
Function
0x00 Monitor core power voltage
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Publication Release Date: May, 2007
Revision 1.3