W681307 Datasheet, PDF (130/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM

W681307
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TxFIFO[7:0]
Store data in SPI TX-FIFO when micro controller writes data to this register.
15.1.7
Read RX FIFO
Address
0x1726
Access Mode Value At Reset Nominal Value
R
00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RxFIFO[7:0]
Read data from SPI RX-FIFO when micro controller read data from this register.
15.1.8
SPI_Transfer_Size
Address
0x1727
Access Mode Value At Reset Nominal Value
R/W
00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Reserved
Reserved
Reserved
Transfer Size [3:0]
SPI_Transfer_Size perform (transfer size+1) bytes of Tx/Rx when start_rtx is set. (master mode only)
15.1.9
SPI_Start_rtx
Address
0x1728
Access Mode Value At Reset Nominal Value
R/W
00
Bit 7
Reserved
Bit 6
Reserved
Bit 5
Reserved
Bit 4
Reserved
Bit 3
Reserved
Bit 2
Reserved
Bit 1
Reserved
Bit 0
Start_rtx
Start_rtx
Set to 1 to start Tx/Rx for (transfer size+1) bytes; cleared by hardware automatically when it is done.
(master mode only)
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Publication Release Date: May, 2007
Revision 1.3