W981216AH Datasheet, PDF (29/44 Pages) Winbond – 2M x 16 bit x 4 Banks SDRAM

W981216AH
AutoRefresh cycle
2M x 16 bit x 4 Banks SDRAM
(CLK = 100 MHz)
CLK
CS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
tRP
tRC
t RC
RAS
CAS
WE
BS0,1
A10
A0-A9,
A11
DQM
CKE
DQ
All Banks
Prechage
Auto
Refresh
Auto Refresh (Arbitrary Cycle)
Revision 1.0
- 29 -
Publication Release Date: March, 1999