W942508CH Datasheet, PDF (18/47 Pages) Winbond – 8M x 4 BANKS x 8 BIT DDR SDRAM

W942508CH
Function Truth Table, continued
CURRENT
STATE
Write
Recovering
Write
Recovering
with Auto
Precharge
Refreshing
CS ^{RAS CAS WE ADDRESS}
COMMAND
H X X XX
DSL
L H H HX
NOP
L H H LX
BST
L H L H BS, CA, A10 READ/READA
L H L L BS, CA, A10 WRIT/WRITA
L L H H BS, RA
ACT
L L H L BS, A10
PRE/PREA
L L L HX
AREF/SELF
L L L L Op-Code
MRS/EMRS
H X X XX
DSL
L H H HX
NOP
L H H LX
BST
L H L H BS, CA, A10 READ/READA
L H L L BS, CA, A10 WRIT/WRITA
L L H H BS, RA
ACT
L L H L BS, A10
PRE/PREA
L L L HX
AREF/SELF
L L L L Op-Code
MRS/EMRS
H X X XX
DSL
ACTION
NOTES
Nop->Row active after tWR
Nop->Row active after tWR
ILLEGAL
ILLEGAL
3
ILLEGAL
3
ILLEGAL
3
ILLEGAL
3
ILLEGAL
ILLEGAL
Nop->Enter precharge after tWR
Nop->Enter precharge after tWR
ILLEGAL
ILLEGAL
3
ILLEGAL
3
ILLEGAL
3
ILLEGAL
3
ILLEGAL
ILLEGAL
Nop->Idle after tRC
Mode
Register
Accessing
L H H HX
L H H LX
L H L HX
L L H XX
L L L XX
H X X XX
L H H HX
L H H LX
L H L XX
L L X XX
NOP
BST
READ/WRIT
ACT/PRE/PREA
AREF/SELF/MRS/EM
DSL
NOP
BST
READ/WRIT
ACT/PRE/PREA/ARE
F/SELF/MRS/EMRS
Nop->Idle after tRC
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop->Row after tMRD
Nop->Row after tMRD
ILLEGAL
ILLEGAL
ILLEGAL
Notes:
1. All entries assume that CKE was active (High level) during the preceding clock cycle and the current clock cycle.
2. Illegal if any bank is not idle.
3. Illegal to bank in specified states; Function may be legal in the bank indicated by Bank Address (BS), depending on the
state of that bank.
4. Illegal if tRCD is not satisfied.
5. Illegal if tRAS is not satisfied.
6. Must satisfy burst interrupt condition.
7. Must avoid bus contention, bus turn around, and/or satisfy write recovery requirements.
8. Must mask preceding data which don’t satisfy tWR
Remark: H = High level, L = Low level, X = High or Low level (Don’t care), V = Valid data
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