W942508CH Datasheet, PDF (13/47 Pages) Winbond – 8M x 4 BANKS x 8 BIT DDR SDRAM

W942508CH
7.7 AC Test Conditions
PARAMETER
Input High Voltage (AC)
Input Low Voltage (AC)
Input Reference Voltage
Termination Voltage
Input Signal Peak to Peak Swing
Differential Clock Input Reference Voltage
Input Difference Voltage. CLK and CLK Inputs (AC)
Input Signal Minimum Slew Rate
Output Timing Measurement Reference Voltage
SYMBOL
VIH
VIL
VREF
VTT
VSWING
VR
VID (AC)
SLEW
VOTR
VALUE
VREF +0.31
VREF -0.31
0.5 x VDDQ
0.5 x VDDQ
1.0
Vx (AC)
1.5
1.0
0.5 x VDDQ
UNIT
V
V
V
V
V
V
V
V/nS
V
V SWING (MAX)
VDDQ
VSS
T
VIH min (AC)
VREF
VIL max (AC)
T ^Output
Measurement point
output
Z = 50 ohms
VTT
RT= 50 ohms
30pF
SLEW = (VIH min (AC) - VILmax (AC)) / T
A.C. TEST LOAD (A)
Notes:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Conditions outside the limits listed under "ABSOLUTE MAXIMUM RATINGS" may cause permanent damage to the
device.
All voltages are referenced to VSS, VSSQ.(2.6V±0.1V for DDR400)
Peak to peak AC noise on VREF may not exceed ±2% VREF(DC).
VOH = 1.95V, VOL = 0.35V
VOH = 1.9V, VOL = 0.4V
The values of IOH (DC) is based on VDDQ = 2.3V and VTT = 1.19V.
The values of IOL (DC) is based on VDDQ = 2.3V and VTT = 1.11V.
These parameters depend on the cycle rate and these values are measured at a cycle rate with the minimum values
of tCK and tRC.
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Publication Release Date: May 21, 2003
Revision A3