W942508CH Datasheet, PDF (15/47 Pages) Winbond – 8M x 4 BANKS x 8 BIT DDR SDRAM

W942508CH
8. OPERATION MODE
The following table shows the operation commands.
8.1 Simplified Truth Table
SYM.
COMMAND
ACT
PRE
Bank Active
Bank Precharge
DEVICE
STATE
CKEN-1 CKEN
DM⁽⁴⁾
BS0
BS1
A10
A12,
A11,
A9-A0
CS RAS CAS
WE
Idle⁽³⁾
H
X
X
V
V
V
LL
H
H
Any⁽³⁾
H
X
X
V
L
X
LL
H
L
PREA
WRIT
Precharge All
Write
Any
H
X
X
X
H
X
LL
H
L
Active⁽³⁾
H
X
X
V
L
V
LH
L
L
WRITA
READ
Write with Auto
Precharge
Read
Active⁽³⁾
H
X
X
V
H
V
LH
L
L
Active⁽³⁾
H
X
X
V
L
V
LH
L
H
READA
Read with Auto
Precharge
Active⁽³⁾
H
X
X
V
H
V
LH
L
H
MRS
Mode Register
Set
Idle
H
X
X L, L C
C
LL
L
L
EMRS
Extended Mode
Regiser Set
Idle
H
X
X H, L V
V
LL
L
L
NOP
No Operation
Any
H
X
X
X
X
X
LH
H
H
BST
Burst Read Stop
Active
H
X
X
X
X
X
LH
H
L
DSL
Device Deselect
Any
H
X
X
X
X
X
HX
X
X
AREF
Auto Refresh
Idle
H
H
X
X
X
X
LL
L
H
SELF
Self Refresh Entry
Idle
H
L
X
X
X
X
LL
L
H
SELEX Self Refresh Exit
Idle (Self
Refresh)
L
HX
X
X
H
X
X
X
X
LH
H
X
PD
Power Down
Mode Entry
Idle/
Active⁽⁵⁾
H
HX
X
X
L
X
X
X
X
LH
H
X
PDEX
Power Down
Mode Exit
Any
HX
X
X
(Power
L
H
X
X
X
X
Down)
LH
H
X
WDE
Data Write Enable Active
H
X
L
X
X
X
XX
X
X
WDD
Data Write
Disable
Active
H
X
H
X
X
X
XX
X
X
Notes:
1. V = Valid X = Don’t Care L = Low level H = High level
2. CKE_n signal is input level when commands are issued.
CKE_n-1 signal is input level one clock cycle before the commands are issued.
3. These are state designated by the BS0, BS1 signals.
4. LDM, UDM (W942516CH)
5. Power Down Mode can not entry in the burst cycle.
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Publication Release Date: May 21, 2003
Revision A3